From patchwork Tue Sep 29 22:37:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 7291131 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E27A3BEEA4 for ; Tue, 29 Sep 2015 22:37:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E105120685 for ; Tue, 29 Sep 2015 22:37:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1CE03205E5 for ; Tue, 29 Sep 2015 22:37:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751229AbbI2Whz (ORCPT ); Tue, 29 Sep 2015 18:37:55 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:46888 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750813AbbI2Whw (ORCPT ); Tue, 29 Sep 2015 18:37:52 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id t8TMbnLc001383; Tue, 29 Sep 2015 17:37:49 -0500 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8TMbnG1022715; Tue, 29 Sep 2015 17:37:49 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Tue, 29 Sep 2015 17:37:50 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t8TMbnjJ007777; Tue, 29 Sep 2015 17:37:49 -0500 Received: from localhost (irmo.am.dhcp.ti.com [128.247.9.166]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id t8TMbn918778; Tue, 29 Sep 2015 17:37:49 -0500 (CDT) From: Suman Anna To: Tero Kristo CC: Mike Turquette , Stephen Boyd , , , , Suman Anna Subject: [PATCH] clk: ti: dflt: fix enable_reg validity check Date: Tue, 29 Sep 2015 17:37:47 -0500 Message-ID: <1443566267-50225-1-git-send-email-s-anna@ti.com> X-Mailer: git-send-email 2.5.0 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The default clock enabling functions for TI clocks - omap2_dflt_clk_enable() and omap2_dflt_clk_disable() perform a NULL check for the enable_reg field of the clk_hw_omap structure. This enable_reg field however is merely a combination of the index of the master IP module, and the offset from the master IP module's base address. A value of 0 is perfectly valid, and the current error checking will fail in these cases. The issue was found when trying to enable the iva2_ck clock on OMAP3 platforms. So, switch the check to use IS_ERR. This correction is similar to the logic used in commit c807dbedb5e5 ("clk: ti: fix ti_clk_get_reg_addr error handling"). Signed-off-by: Suman Anna --- Hi Tero, Patch done against 4.3-rc3. There are couple of similar checks in drivers/clk/ti/clockdomain.c, but those seem to be ok. This is a non-urgent fix, as there are currently no active users of iva2_ck in the kernel (the MMU node is disabled in DT atm). Boot tested on OMAP3 Beagle-XM, AM437x GP EVM, AM335x BeagleBone Black, OMAP4 Panda, OMAP5 uEVM and DRA7 Beagle-X15 boards. regards Suman Following is the error log from a unit test of the IVA MMU on OMAP3 using some additional patch to enable the DTS node, [ 86.626342] omap_iommu_test_init: iommu_test_init entered [ 86.632080] omap_iommu_test iommu_test: Enabling IOMMU... [ 86.647460] omap_iommu_test iommu_test: testing IOMMU 5d000000.mmu [ 86.654815] omap2_dflt_clk_enable: iva2_ck missing enable_reg [ 86.680938] ------------[ cut here ]------------ [ 86.685821] WARNING: CPU: 0 PID: 910 at drivers/clk/clk.c:675 clk_disable+0x28/0x34() [ 86.694091] Modules linked in: iommu_dt_test(O+) [ 86.698974] CPU: 0 PID: 910 Comm: insmod Tainted: G O 4.3.0-rc3-00008-g61458979cbbe #40 [ 86.708618] Hardware name: Generic OMAP36xx (Flattened Device Tree) [ 86.715240] [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [ 86.723419] [] (show_stack) from [] (dump_stack+0x84/0x9c) [ 86.731048] [] (dump_stack) from [] (warn_slowpath_common+0x78/0xb4) [ 86.739593] [] (warn_slowpath_common) from [] (warn_slowpath_null+0x1c/0x24) [ 86.748870] [] (warn_slowpath_null) from [] (clk_disable+0x28/0x34) [ 86.757324] [] (clk_disable) from [] (_disable_clocks+0x18/0x68) [ 86.765502] [] (_disable_clocks) from [] (omap_hwmod_deassert_hardreset+0xc8/0x180) [ 86.775421] [] (omap_hwmod_deassert_hardreset) from [] (omap_device_deassert_hardreset+0x34/ 0x54) [ 86.786621] [] (omap_device_deassert_hardreset) from [] (omap_iommu_attach_dev+0xbc/0x1fc) [ 86.797180] [] (omap_iommu_attach_dev) from [] (__iommu_attach_device+0x1c/0x80) [ 86.806854] [] (__iommu_attach_device) from [] (omap_iommu_test_probe+0xd0/0x21c [iommu_dt_t est]) [ 86.818054] [] (omap_iommu_test_probe [iommu_dt_test]) from [] (platform_drv_probe+0x44/0xa4 ) [ 86.828857] [] (platform_drv_probe) from [] (driver_probe_device+0x1f4/0x2f0) [ 86.838195] [] (driver_probe_device) from [] (__driver_attach+0x94/0x98) [ 86.847045] [] (__driver_attach) from [] (bus_for_each_dev+0x6c/0xa0) [ 86.855651] [] (bus_for_each_dev) from [] (bus_add_driver+0x18c/0x214) [ 86.864349] [] (bus_add_driver) from [] (driver_register+0x78/0xf8) [ 86.872772] [] (driver_register) from [] (do_one_initcall+0x80/0x1dc) [ 86.881378] [] (do_one_initcall) from [] (do_init_module+0x5c/0x1d0) [ 86.889892] [] (do_init_module) from [] (load_module+0x1818/0x1f70) [ 86.898315] [] (load_module) from [] (SyS_init_module+0xdc/0x14c) [ 86.906555] [] (SyS_init_module) from [] (ret_fast_syscall+0x0/0x1c) [ 86.915039] ---[ end trace 49b229a4289ab8b2 ]--- [ 86.919891] omap_hwmod: mmu_iva: failed to hardreset [ 86.925384] omap-iommu 5d000000.mmu: deassert_reset failed: -16 [ 86.931640] omap_iommu_test iommu_test: can't get omap iommu: -16 [ 86.938140] omap_iommu_test iommu_test: can't attach iommu device: -16 [ 86.945068] omap_iommu_test_init failed, ret = -16 drivers/clk/ti/clkt_dflt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/ti/clkt_dflt.c b/drivers/clk/ti/clkt_dflt.c index 90d7d8a21c49..1ddc288fce4e 100644 --- a/drivers/clk/ti/clkt_dflt.c +++ b/drivers/clk/ti/clkt_dflt.c @@ -222,7 +222,7 @@ int omap2_dflt_clk_enable(struct clk_hw *hw) } } - if (unlikely(!clk->enable_reg)) { + if (unlikely(IS_ERR(clk->enable_reg))) { pr_err("%s: %s missing enable_reg\n", __func__, clk_hw_get_name(hw)); ret = -EINVAL; @@ -264,7 +264,7 @@ void omap2_dflt_clk_disable(struct clk_hw *hw) u32 v; clk = to_clk_hw_omap(hw); - if (!clk->enable_reg) { + if (IS_ERR(clk->enable_reg)) { /* * 'independent' here refers to a clock which is not * controlled by its parent.