From patchwork Tue Oct 13 01:38:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Franklin Cooper X-Patchwork-Id: 7380591 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 994B3BF90C for ; Tue, 13 Oct 2015 01:39:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CB6D820985 for ; Tue, 13 Oct 2015 01:39:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DFD4020987 for ; Tue, 13 Oct 2015 01:39:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932294AbbJMBja (ORCPT ); Mon, 12 Oct 2015 21:39:30 -0400 Received: from mail-ob0-f195.google.com ([209.85.214.195]:36509 "EHLO mail-ob0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932279AbbJMBj1 (ORCPT ); Mon, 12 Oct 2015 21:39:27 -0400 Received: by obclh8 with SMTP id lh8so222946obc.3; Mon, 12 Oct 2015 18:39:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OJAj5VTjx5mcCLE/d8qHW91EriQis421vT1xL7cJCps=; b=LlcsZ4pOysCgaW636FFuK2uB7nRHPqpkuDzGBbbY0qH8T+PYkVKYKthyhfNRMxZE3p yX6jxNixUTFQQ/9pjEXIvZsj/hkkccqLJ95RP5Tq/msQ8F9ayTeUOesr9Pt5f6TG0JMp bicN4FWjxVzTeMGEXPaH62xbP7nOVSaCt2PyLGbyRE5HqC+oTfmCQZFRNvOp1KJZ3+Sg qQpcFIaqzeelRV/NZM+SybxTTCH7SejN04yjhASw2IXssXa1HvAkT/o5aHbofTyC6Qpb YAet20u0cFp6T96ZorVjMy5TtEYoDGxi6aRLMFT7dG+LZt+bo+zzHNbBSBOm/MKvWK/Q Luaw== X-Received: by 10.60.177.129 with SMTP id cq1mr17351683oec.42.1444700367232; Mon, 12 Oct 2015 18:39:27 -0700 (PDT) Received: from localhost.localdomain (pool-71-97-41-79.dllstx.fios.verizon.net. [71.97.41.79]) by smtp.gmail.com with ESMTPSA id ta5sm320312obc.13.2015.10.12.18.39.26 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 12 Oct 2015 18:39:26 -0700 (PDT) From: Franklin S Cooper Jr To: linux-kernel@vger.kernel.org, rogerq@ti.com, devicetree@vger.kernel.org, linux-omap@vger.kernel.org, linux-mtd@lists.infradead.org, nsekhar@ti.com, computersforpeace@gmail.com, dwmw2@infradead.org, tony@atomide.com Cc: Franklin S Cooper Jr Subject: [PATCH 5/5] ARM: OMAP2+: Update gpmc and nand DT binding documentation Date: Mon, 12 Oct 2015 20:38:58 -0500 Message-Id: <1444700338-27582-6-git-send-email-fcooper@ti.com> X-Mailer: git-send-email 2.6.1 In-Reply-To: <1444700338-27582-1-git-send-email-fcooper@ti.com> References: <1444700338-27582-1-git-send-email-fcooper@ti.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add additional details to the gpmc and nand documentation to clarify what is needed to enable nand dma prefetch. Signed-off-by: Franklin S Cooper Jr --- Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt | 7 ++++++- Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 2 ++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt b/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt index 704be93..b1e2802 100644 --- a/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt @@ -33,6 +33,10 @@ Required properties: As this will change in the future, filling correct values here is a requirement. +GPMC DMA information. Required only when GPMC nand prefetch is enabled. + - dmas GPMC nand prefetch dma channel + - dma-names DMA channel name use as a reference within the Nand driver + Timing properties for child nodes. All are optional and default to 0. - gpmc,sync-clk-ps: Minimum clock period for synchronous mode, in picoseconds @@ -119,7 +123,8 @@ Example for an AM33xx board: ti,hwmods = "gpmc"; reg = <0x50000000 0x2000>; interrupts = <100>; - + dmas = <&edma 52>; + dma-names = "rxtx"; gpmc,num-cs = <8>; gpmc,num-waitpins = <2>; #address-cells = <2>; diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt index 253e6de..4b0c240 100644 --- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt +++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt @@ -61,6 +61,8 @@ Example for an AM33xx board: ti,hwmods = "gpmc"; reg = <0x50000000 0x36c>; interrupts = <100>; + dmas = <&edma 52>; + dma-names = "rxtx"; gpmc,num-cs = <8>; gpmc,num-waitpins = <2>; #address-cells = <2>;