From patchwork Sat Oct 24 17:05:13 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 7480911 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 339D29F36A for ; Sat, 24 Oct 2015 17:05:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4789C2064C for ; Sat, 24 Oct 2015 17:05:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3D1DE2062E for ; Sat, 24 Oct 2015 17:05:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752111AbbJXRFX (ORCPT ); Sat, 24 Oct 2015 13:05:23 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:59763 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751844AbbJXRFW (ORCPT ); Sat, 24 Oct 2015 13:05:22 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id t9OH5IUH000989; Sat, 24 Oct 2015 12:05:19 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t9OH5IEW003059; Sat, 24 Oct 2015 12:05:18 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Sat, 24 Oct 2015 12:05:18 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t9OH5IDY009494; Sat, 24 Oct 2015 12:05:18 -0500 Received: from localhost (uda0226330.am.dhcp.ti.com [128.247.8.252]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id t9OH5I925544; Sat, 24 Oct 2015 12:05:18 -0500 (CDT) From: "Andrew F. Davis" To: =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Tony Lindgren , Javier Martinez Canillas CC: , , , "Andrew F. Davis" Subject: [PATCH v2] ARM: dts: am335x-boneblack: Use pinctrl constants and AM33XX_IOPAD macro Date: Sat, 24 Oct 2015 12:05:13 -0500 Message-ID: <1445706313-14761-1-git-send-email-afd@ti.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Using constants for pinctrl allows better readability and removes redundancy with comments. AM33XX_IOPAD allows us to use part of the pinctrl physical address as in the TRM instead of an offset. Signed-off-by: Andrew F. Davis Reviewed-by: Javier Martinez Canillas --- arch/arm/boot/dts/am335x-boneblack.dts | 44 +++++++++++++++++----------------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts index eadbba3..346f529 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts @@ -36,32 +36,32 @@ &am33xx_pinmux { nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { pinctrl-single,pins = < - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ - 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ - 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ - 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + AM33XX_IOPAD(0x9b0, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* xdma_event_intr0 */ + AM33XX_IOPAD(0x8a0, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data0.lcd_data0 */ + AM33XX_IOPAD(0x8a4, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data1.lcd_data1 */ + AM33XX_IOPAD(0x8a8, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data2.lcd_data2 */ + AM33XX_IOPAD(0x8ac, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data3.lcd_data3 */ + AM33XX_IOPAD(0x8b0, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data4.lcd_data4 */ + AM33XX_IOPAD(0x8b4, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data5.lcd_data5 */ + AM33XX_IOPAD(0x8b8, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data6.lcd_data6 */ + AM33XX_IOPAD(0x8bc, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data7.lcd_data7 */ + AM33XX_IOPAD(0x8c0, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data8.lcd_data8 */ + AM33XX_IOPAD(0x8c4, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data9.lcd_data9 */ + AM33XX_IOPAD(0x8c8, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data10.lcd_data10 */ + AM33XX_IOPAD(0x8cc, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data11.lcd_data11 */ + AM33XX_IOPAD(0x8d0, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data12.lcd_data12 */ + AM33XX_IOPAD(0x8d4, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data13.lcd_data13 */ + AM33XX_IOPAD(0x8d8, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data14.lcd_data14 */ + AM33XX_IOPAD(0x8dc, (PIN_OUTPUT | MUX_MODE0)) /* lcd_data15.lcd_data15 */ + AM33XX_IOPAD(0x8e0, (PIN_OUTPUT_PULLDOWN | MUX_MODE0)) /* lcd_vsync.lcd_vsync */ + AM33XX_IOPAD(0x8e4, (PIN_OUTPUT_PULLDOWN | MUX_MODE0)) /* lcd_hsync.lcd_hsync */ + AM33XX_IOPAD(0x8e8, (PIN_OUTPUT_PULLDOWN | MUX_MODE0)) /* lcd_pclk.lcd_pclk */ + AM33XX_IOPAD(0x8ec, (PIN_OUTPUT_PULLDOWN | MUX_MODE0)) /* lcd_ac_bias_en.lcd_ac_bias_en */ >; }; nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { pinctrl-single,pins = < - 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ + AM33XX_IOPAD(0x9b0, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* xdma_event_intr0 */ >; }; };