From patchwork Thu Nov 12 17:50:40 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 7604411 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D18F69F1C2 for ; Thu, 12 Nov 2015 17:51:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 07E3720809 for ; Thu, 12 Nov 2015 17:51:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1445C20732 for ; Thu, 12 Nov 2015 17:51:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753709AbbKLRvN (ORCPT ); Thu, 12 Nov 2015 12:51:13 -0500 Received: from arroyo.ext.ti.com ([192.94.94.40]:49415 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753701AbbKLRvM (ORCPT ); Thu, 12 Nov 2015 12:51:12 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id tACHohFt008381; Thu, 12 Nov 2015 11:50:43 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id tACHogP1006165; Thu, 12 Nov 2015 11:50:42 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Thu, 12 Nov 2015 11:50:42 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id tACHofdm010264; Thu, 12 Nov 2015 11:50:42 -0600 From: Felipe Balbi To: Javier Martinez Canillas , Santosh Shilimkar , Kevin Hilman , Linus Walleij , Alexandre Courbot CC: Linux OMAP Mailing List , Linux ARM Kernel Mailing List , Tony Lindgren , , Felipe Balbi Subject: [PATCH] gpio: omap: fix debounce time calculation Date: Thu, 12 Nov 2015 11:50:40 -0600 Message-ID: <1447350640-20347-1-git-send-email-balbi@ti.com> X-Mailer: git-send-email 2.6.2 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP According to TRM, debounce is measured in periods of the functional clock of the GPIO IP. This means that we should divide by the rate of functional clock. Signed-off-by: Felipe Balbi --- drivers/gpio/gpio-omap.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 56d2d026e62e..2b29fd195521 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -217,15 +217,29 @@ static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, u32 val; u32 l; bool enable = !!debounce; + unsigned long flags; if (!bank->dbck_flag) return; if (enable) { - debounce = DIV_ROUND_UP(debounce, 31) - 1; + struct clk *clk; + unsigned long rate; + + clk = clk_get(bank->dev, "fck"); + if (IS_ERR(clk)) { + dev_err(bank->dev, "can't get clock\n"); + return; + } + + rate = clk_get_rate(clk); + clk_put(clk); + + debounce = DIV_ROUND_UP(debounce, rate); debounce &= OMAP4_GPIO_DEBOUNCINGTIME_MASK; } + raw_spin_lock_irqsave(&bank->lock, flags); l = BIT(offset); clk_enable(bank->dbck); @@ -256,6 +270,7 @@ static void omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, bank->context.debounce = debounce; bank->context.debounce_en = val; } + raw_spin_unlock_irqrestore(&bank->lock, flags); } /** @@ -1002,14 +1017,9 @@ static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value) static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset, unsigned debounce) { - struct gpio_bank *bank; - unsigned long flags; - - bank = container_of(chip, struct gpio_bank, chip); + struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); - raw_spin_lock_irqsave(&bank->lock, flags); omap2_set_gpio_debounce(bank, offset, debounce); - raw_spin_unlock_irqrestore(&bank->lock, flags); return 0; }