From patchwork Fri Nov 13 04:53:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 7608761 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5EB47BF90C for ; Fri, 13 Nov 2015 05:05:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7276B2053B for ; Fri, 13 Nov 2015 05:05:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 844D220462 for ; Fri, 13 Nov 2015 05:05:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932991AbbKMEy4 (ORCPT ); Thu, 12 Nov 2015 23:54:56 -0500 Received: from lists.s-osg.org ([54.187.51.154]:54271 "EHLO lists.s-osg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932969AbbKMEyx (ORCPT ); Thu, 12 Nov 2015 23:54:53 -0500 Received: from minerva.localdomain (unknown [181.120.163.21]) by lists.s-osg.org (Postfix) with ESMTPSA id DE753462B3; Thu, 12 Nov 2015 20:54:51 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Cc: linux-omap@vger.kernel.org, Tony Lindgren , Javier Martinez Canillas Subject: [PATCH 06/39] ARM: dts: am335x-chiliboard: Use AM33XX_IOPAD pinmux macro Date: Fri, 13 Nov 2015 01:53:44 -0300 Message-Id: <1447390457-1158-7-git-send-email-javier@osg.samsung.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1447390457-1158-1-git-send-email-javier@osg.samsung.com> References: <1447390457-1158-1-git-send-email-javier@osg.samsung.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use the pinmux IOPAD macro to define the register absolute physical address instead of the offset from the padconf base address. This makes the DTS easier to read since matches the addresses listed in the Technical Reference Manual. Signed-off-by: Javier Martinez Canillas --- arch/arm/boot/dts/am335x-chiliboard.dts | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/am335x-chiliboard.dts b/arch/arm/boot/dts/am335x-chiliboard.dts index 310da20a8aa7..15d47ab28865 100644 --- a/arch/arm/boot/dts/am335x-chiliboard.dts +++ b/arch/arm/boot/dts/am335x-chiliboard.dts @@ -37,26 +37,26 @@ &am33xx_pinmux { usb1_drvvbus: usb1_drvvbus { pinctrl-single,pins = < - 0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */ + AM33XX_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */ >; }; sd_pins: pinmux_sd_card { pinctrl-single,pins = < - 0xf0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ - 0xf4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ - 0xf8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ - 0xfc (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ - 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ - 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ - 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ + AM33XX_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ + AM33XX_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ + AM33XX_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ + AM33XX_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ + AM33XX_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ + AM33XX_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ + AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ >; }; led_gpio_pins: led_gpio_pins { pinctrl-single,pins = < - 0x1e4 (PIN_OUTPUT | MUX_MODE7) /* emu0.gpio3_7 */ - 0x1e8 (PIN_OUTPUT | MUX_MODE7) /* emu1.gpio3_8 */ + AM33XX_IOPAD(0x9e4, PIN_OUTPUT | MUX_MODE7) /* emu0.gpio3_7 */ + AM33XX_IOPAD(0x9e8, PIN_OUTPUT | MUX_MODE7) /* emu1.gpio3_8 */ >; }; };