From patchwork Mon Nov 30 14:27:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Lifshitz X-Patchwork-Id: 7726501 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8FA919F1C0 for ; Mon, 30 Nov 2015 14:28:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8DE8020552 for ; Mon, 30 Nov 2015 14:28:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C857D2053D for ; Mon, 30 Nov 2015 14:28:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754162AbbK3O2W (ORCPT ); Mon, 30 Nov 2015 09:28:22 -0500 Received: from softlayer.compulab.co.il ([50.23.254.55]:50116 "EHLO compulab.co.il" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754056AbbK3O2V (ORCPT ); Mon, 30 Nov 2015 09:28:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=compulab.co.il; s=default; h=References:In-Reply-To:Message-Id:Date:Subject :Cc:To:From; bh=esmWpw96DpZ1Ggo6xU5czVI+8yuoG1pXXtAmYNVCqE4=; b=lvKWetlBYxfHR A+ZKJUbk7t9g+1XSgeYgACO1aZs0MDNQQlRHHU4Ag7KlCjAef5Lzgk5kVCKwNH5tLf5Se2HYAUVqE ZzqnCMbNAmcBZUebqdB5dwIjI7JmN4diW88lLGe4qFSTD9TDmb4olTsou670mgrmqzi7R9+VfG8mw z7Zw=; Received: from [62.90.235.247] (port=36317 helo=zimbra-mta.compulab.co.il) by softlayer.compulab.co.il with esmtp (Exim 4.86) (envelope-from ) id 1a3PRE-0003qH-HV; Mon, 30 Nov 2015 16:28:20 +0200 Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id AC2BB485869; Mon, 30 Nov 2015 16:28:19 +0200 (IST) Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id Pu_gShe9Ow5T; Mon, 30 Nov 2015 16:28:19 +0200 (IST) Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id 4802148586A; Mon, 30 Nov 2015 16:28:19 +0200 (IST) X-Virus-Scanned: amavisd-new at zimbra-mta.compulab.co.il Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id KTzwjybB87O3; Mon, 30 Nov 2015 16:28:19 +0200 (IST) Received: from dlifshitz.compulab.local (lifshitz-linux.compulab.local [192.168.11.10]) by zimbra-mta.compulab.co.il (Postfix) with ESMTPSA id 1313B485869; Mon, 30 Nov 2015 16:28:19 +0200 (IST) From: Dmitry Lifshitz To: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: Toni Lindgren , Igor Grinberg , Nikita Kiryanov , Ian Campbell , Nishanth Menon , Dmitry Lifshitz Subject: [PATCH v2 07/18] ARM: am57xx: cl-som-am57x: dts: add dual EMAC support Date: Mon, 30 Nov 2015 16:27:31 +0200 Message-Id: <1448893651-764-1-git-send-email-lifshitz@compulab.co.il> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1448433590-1399-1-git-send-email-lifshitz@compulab.co.il> References: <1448433590-1399-1-git-send-email-lifshitz@compulab.co.il> X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - softlayer.compulab.co.il X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - compulab.co.il X-Get-Message-Sender-Via: softlayer.compulab.co.il: acl_c_recent_authed_mail_ips_text_entry: lifshitz@compulab.co.il|compulab.co.il X-Authenticated-Sender: softlayer.compulab.co.il: lifshitz@compulab.co.il Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add dual EMAC support. Signed-off-by: Dmitry Lifshitz Acked-by: Igor Grinberg --- v2: * Fix pinmux comments for RGMII0/1 clock/data lines * Fix pinmux for MDIO bus clock/data lines * Fix PHYs addresses arch/arm/boot/dts/am57xx-cl-som-am57x.dts | 105 ++++++++++++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts index 9042185..1efa090 100644 --- a/arch/arm/boot/dts/am57xx-cl-som-am57x.dts +++ b/arch/arm/boot/dts/am57xx-cl-som-am57x.dts @@ -104,6 +104,85 @@ DRA7XX_CORE_IOPAD(0x34bc, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */ >; }; + + cpsw_pins_default: cpsw_pins_default { + pinctrl-single,pins = < + /* Slave at addr 0x0 */ + DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tclk */ + DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii0_tctl */ + DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3 */ + DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td2 */ + DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td1 */ + DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii0_td0 */ + DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rclk */ + DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rctl */ + DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd3 */ + DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd2 */ + DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd1 */ + DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rgmii0_rd0 */ + + /* Slave at addr 0x1 */ + DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_tclk */ + DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */ + DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */ + DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */ + DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */ + DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */ + DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */ + DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */ + DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ + DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ + DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ + DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ + >; + }; + + cpsw_pins_sleep: cpsw_pins_sleep { + pinctrl-single,pins = < + /* Slave 1 */ + DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15) + + /* Slave 2 */ + DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15) + >; + }; + + davinci_mdio_pins_default: davinci_mdio_pins_default { + pinctrl-single,pins = < + /* MDIO */ + DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | MUX_MODE3)/* vin2a_d10.mdio_mclk */ + DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d11.mdio_d */ + >; + }; + + davinci_mdio_pins_sleep: davinci_mdio_pins_sleep { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE15) + DRA7XX_CORE_IOPAD(0x3594, PIN_INPUT | MUX_MODE15) + >; + }; }; &i2c1 { @@ -375,3 +454,29 @@ }; }; }; + +&mac { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_pins_default>; + pinctrl-1 = <&cpsw_pins_sleep>; + dual_emac; +}; + +&cpsw_emac0 { + phy_id = <&davinci_mdio>, <0>; + phy-mode = "rgmii"; + dual_emac_res_vlan = <0>; +}; + +&cpsw_emac1 { + phy_id = <&davinci_mdio>, <1>; + phy-mode = "rgmii"; + dual_emac_res_vlan = <1>; +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_pins_default>; + pinctrl-1 = <&davinci_mdio_pins_sleep>; +};