diff mbox

ARM: OMAP2+: LogicPD Torpedo: Add SPI EEPROM

Message ID 1452574678-9411-1-git-send-email-aford173@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Adam Ford Jan. 12, 2016, 4:57 a.m. UTC
The devkit has an AT25 EEPROM on MCSPI1. Enable this with default
parameters.

Signed-off-by: Adam Ford <aford173@gmail.com>
---
 arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts | 14 ++++++++++++++
 arch/arm/boot/dts/logicpd-torpedo-som.dtsi        | 14 ++++++++++++++
 2 files changed, 28 insertions(+)

Comments

Tony Lindgren Feb. 12, 2016, 9:55 p.m. UTC | #1
* Adam Ford <aford173@gmail.com> [160111 20:58]:
> The devkit has an AT25 EEPROM on MCSPI1. Enable this with default
> parameters.
> 
> Signed-off-by: Adam Ford <aford173@gmail.com>

Applying into omap-for-v4.6/dt thanks.

Tony
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
index f926eaa..703ced2 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
+++ b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
@@ -341,6 +341,20 @@ 
 	};
 };
 
+&mcspi1 {
+	at25@0 {
+		compatible = "atmel,at25";
+		reg = <0>;
+		spi-max-frequency = <5000000>;
+		spi-cpha;
+		spi-cpol;
+
+		pagesize = <64>;
+		size = <32768>;
+		address-width = <16>;
+	};
+};
+
 &isp {
 	pinctrl-names = "default";
 	pinctrl-0 = <&isp_pins>;
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 071a316..1876e7d 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -171,6 +171,15 @@ 
 			OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)	/* GPIO_162,BT_EN */
 		>;
 	};
+	mcspi1_pins: pinmux_mcspi1_pins {
+		pinctrl-single,pins = <
+			OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
+			OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
+			OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
+			OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
+		>;
+	};
+
 };
 
 &uart2 {
@@ -179,6 +188,11 @@ 
 	pinctrl-0 = <&uart2_pins>;
 };
 
+&mcspi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mcspi1_pins>;
+};
+
 &omap3_pmx_core2 {
 	mmc3_core2_pins: pinmux_mmc3_core2_pins {
 		pinctrl-single,pins = <