| Message ID | 1457383187-17166-7-git-send-email-fcooper@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, 7 Mar 2016, Franklin S Cooper Jr wrote: > From: Vignesh R <vigneshr@ti.com> > > Add PWMSS device tree nodes for DRA7 SoC family and add documentation > for dt bindings. > > Signed-off-by: Vignesh R <vigneshr@ti.com> > [fcooper@ti.com: Use updated bindings for PWMSS and ePWM] > Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> > --- > Version 4 changes: > Remove hwmod entries. > Add clocks/clock-names to pwm nodes. Hmm, what about moving the eqep, ecap DT nodes under the epwmss nodes? - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 03/07/2016 05:53 PM, Paul Walmsley wrote: > On Mon, 7 Mar 2016, Franklin S Cooper Jr wrote: > >> From: Vignesh R <vigneshr@ti.com> >> >> Add PWMSS device tree nodes for DRA7 SoC family and add documentation >> for dt bindings. >> >> Signed-off-by: Vignesh R <vigneshr@ti.com> >> [fcooper@ti.com: Use updated bindings for PWMSS and ePWM] >> Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> >> --- >> Version 4 changes: >> Remove hwmod entries. >> Add clocks/clock-names to pwm nodes. > Hmm, what about moving the eqep, ecap DT nodes under the epwmss nodes? > > > - Paul We don't have a driver for eQEP which is why there is no DT entry for it. For eCAP, the original patch series didn't include the eCAP DT nodes and I never verified why this is the case. In our TI tree we have eCAP0 only in the DT. The TRM doesn't state that eCAP0-2 are unsupported so there should be entries for all 3 eCAPs. For AM335x and AM437x, eCAP nodes are already under the ePWMSS nodes. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 03/07/2016 05:53 PM, Paul Walmsley wrote: > On Mon, 7 Mar 2016, Franklin S Cooper Jr wrote: > >> From: Vignesh R <vigneshr@ti.com> >> >> Add PWMSS device tree nodes for DRA7 SoC family and add documentation >> for dt bindings. >> >> Signed-off-by: Vignesh R <vigneshr@ti.com> >> [fcooper@ti.com: Use updated bindings for PWMSS and ePWM] >> Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> >> --- >> Version 4 changes: >> Remove hwmod entries. >> Add clocks/clock-names to pwm nodes. > Hmm, what about moving the eqep, ecap DT nodes under the epwmss nodes? > > > - Paul We don't have a driver for eQEP which is why there is no DT entry for it. For eCAP, the original patch series didn't include the eCAP DT nodes and I never verified why this is the case. In our TI tree we have eCAP0 only in the DT. The TRM doesn't state that eCAP0-2 are unsupported so there should be entries for all 3 eCAPs. For AM335x and AM437x, eCAP nodes are already under the ePWMSS nodes. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, 7 Mar 2016, Franklin S Cooper Jr. wrote: > On 03/07/2016 05:53 PM, Paul Walmsley wrote: > > > Hmm, what about moving the eqep, ecap DT nodes under the epwmss nodes? > > We don't have a driver for eQEP which is why there is no DT > entry for it. I've already queued the patch for merging. But just for your background knowledge, and the various lists: the basic device integration data, whether in DT or in hwmod, should be decoupled from the existence of drivers. It should be possible to have a complete set of SoC integration data ready to integrate at the moment that a device is approved for upstreaming. That way, driver writers can simply write and merge their driver, with the minimum of patches to the integration data. Generally the people who work on device drivers aren't too familiar with SoC integration - they are focused on their specific IP blocks - so it makes sense to decouple these components. So: in the context of the present epwmss discussion, in an ideal world, we'd have DT entries for eQEP, even though there's no driver available yet. - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt index 345d3f6..5965b9d 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt @@ -4,6 +4,7 @@ Required properties: - compatible: Must be "ti,<soc>-ehrpwm". for am33xx - compatible = "ti,am33xx-ehrpwm"; for da850 - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; + for dra7xx - compatible = "ti,dra7xx-ehrpwm", "ti,am33xx-ehrpwm"; - #pwm-cells: should be 3. See pwm.txt in this directory for a description of the cells format. The only third cell flag supported by this binding is PWM_POLARITY_INVERTED. @@ -28,3 +29,11 @@ ehrpwm0: pwm@01f00000 { /* EHRPWM on da850 */ #pwm-cells = <3>; reg = <0x300000 0x2000>; }; + +ehrpwm0: pwm@4843e200 { /* EHRPWM on dra7xx */ + compatible = "ti,dra7xx-ehrpwm", "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48440200 0x80>; + clocks = <&ehrpwm0_tbclk>; + clock-names = "tbclk"; +}; diff --git a/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt b/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt index 672fa71..f137d0b 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt @@ -1,7 +1,9 @@ TI SOC based PWM Subsystem Required properties: -- compatible: Must be "ti,am33xx-pwmss"; +- compatible: Must be "ti,<soc>-pwmss". + for am33xx - compatible = "ti,am33xx-pwmss" + for dra7xx - compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss" - reg: physical base address and size of the registers map. - address-cells: Specify the number of u32 entries needed in child nodes. Should set to 1. @@ -25,3 +27,14 @@ pwmss0: pwmss@48300000 { /* child nodes go here */ }; + +epwmss0: epwmss@4843e000 { /* On DRA7xx */ + compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss"; + reg = <0x4843e000 0x30>; + ti,hwmods = "epwmss0"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* child nodes go here */ +}; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index c4d9175..cc161b3 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1597,6 +1597,66 @@ clock-names = "fck", "sys_clk"; }; }; + + epwmss0: epwmss@4843e000 { + compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss"; + reg = <0x4843e000 0x30>; + ti,hwmods = "epwmss0"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges; + + ehrpwm0: pwm@4843e200 { + compatible = "ti,dra7xx-ehrpwm", + "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x4843e200 0x80>; + clocks = <&ehrpwm0_tbclk>; + clock-names = "tbclk"; + status = "disabled"; + }; + }; + + epwmss1: epwmss@48440000 { + compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss"; + reg = <0x48440000 0x30>; + ti,hwmods = "epwmss1"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges; + + ehrpwm1: pwm@48440200 { + compatible = "ti,dra7xx-ehrpwm", + "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48440200 0x80>; + clocks = <&ehrpwm1_tbclk>; + clock-names = "tbclk"; + status = "disabled"; + }; + }; + + epwmss2: epwmss@48442000 { + compatible = "ti,dra7xx-pwmss", "ti,am33xx-pwmss"; + reg = <0x48442000 0x30>; + ti,hwmods = "epwmss2"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges; + + ehrpwm2: pwm@48442200 { + compatible = "ti,dra7xx-ehrpwm", + "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48442200 0x80>; + clocks = <&ehrpwm2_tbclk>; + clock-names = "tbclk"; + status = "disabled"; + }; + }; }; thermal_zones: thermal-zones {