| Message ID | 1458224359-32665-2-git-send-email-jonathanh@nvidia.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Jon Hunter <jonathanh@nvidia.com> writes: > The ARM TWD interrupt is a private peripheral interrupt (PPI) and per > the ARM GIC documentation, whether the type for PPIs can be set is > IMPLEMENTATION DEFINED. For Tegra20/30 devices the PPI type cannot be > set and so when we attempt to set the type for the ARM TWD interrupt it > fails. This has done unnoticed because it fails silently and because we nit: s/done/gone/ > cannot re-configure the type it has had no impact. Nevertheless fix the > type for the TWD interrupt so that it matches the hardware configuration. > > Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, Mar 17, 2016 at 02:19:05PM +0000, Jon Hunter wrote: > The ARM TWD interrupt is a private peripheral interrupt (PPI) and per > the ARM GIC documentation, whether the type for PPIs can be set is > IMPLEMENTATION DEFINED. For Tegra20/30 devices the PPI type cannot be > set and so when we attempt to set the type for the ARM TWD interrupt it > fails. This has done unnoticed because it fails silently and because we > cannot re-configure the type it has had no impact. Nevertheless fix the > type for the TWD interrupt so that it matches the hardware configuration. > > Signed-off-by: Jon Hunter <jonathanh@nvidia.com> > > --- > Ideally, we would not be attempting to set the type for an interrupt > where it cannot be programmed but this would require changes to the > device-tree bindings for the GIC. This series adds a WARNING to catch > any of these silent failures. > --- > arch/arm/boot/dts/tegra20.dtsi | 2 +- > arch/arm/boot/dts/tegra30.dtsi | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) Applied, thanks. Thierry
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 8fb61b93c226..2207c08e3fa3 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -145,7 +145,7 @@ interrupt-parent = <&intc>; reg = <0x50040600 0x20>; interrupts = <GIC_PPI 13 - (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; + (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>; clocks = <&tegra_car TEGRA20_CLK_TWD>; }; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index c6edc8cea34e..5030065cbdfe 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -230,7 +230,7 @@ reg = <0x50040600 0x20>; interrupt-parent = <&intc>; interrupts = <GIC_PPI 13 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>; clocks = <&tegra_car TEGRA30_CLK_TWD>; };
The ARM TWD interrupt is a private peripheral interrupt (PPI) and per the ARM GIC documentation, whether the type for PPIs can be set is IMPLEMENTATION DEFINED. For Tegra20/30 devices the PPI type cannot be set and so when we attempt to set the type for the ARM TWD interrupt it fails. This has done unnoticed because it fails silently and because we cannot re-configure the type it has had no impact. Nevertheless fix the type for the TWD interrupt so that it matches the hardware configuration. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> --- Ideally, we would not be attempting to set the type for an interrupt where it cannot be programmed but this would require changes to the device-tree bindings for the GIC. This series adds a WARNING to catch any of these silent failures. --- arch/arm/boot/dts/tegra20.dtsi | 2 +- arch/arm/boot/dts/tegra30.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)