From patchwork Wed May 4 16:25:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 9016661 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4C6BEBF29F for ; Wed, 4 May 2016 16:31:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 59AC6203B8 for ; Wed, 4 May 2016 16:31:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 613DA202E9 for ; Wed, 4 May 2016 16:31:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754377AbcEDQa7 (ORCPT ); Wed, 4 May 2016 12:30:59 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:4714 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754093AbcEDQ0R (ORCPT ); Wed, 4 May 2016 12:26:17 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Wed, 04 May 2016 09:25:45 -0700 Received: from HQMAIL104.nvidia.com ([172.18.146.11]) by hqnvupgp07.nvidia.com (PGP Universal service); Wed, 04 May 2016 09:25:10 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Wed, 04 May 2016 09:25:10 -0700 Received: from HQMAIL102.nvidia.com (172.18.146.10) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 4 May 2016 16:26:16 +0000 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL102.nvidia.com (172.18.146.10) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 4 May 2016 16:26:15 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1130.7 via Frontend Transport; Wed, 4 May 2016 16:26:16 +0000 Received: from jonathanh-lm.nvidia.com (Not Verified[10.21.132.133]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 5, 8150) id ; Wed, 04 May 2016 09:26:15 -0700 From: Jon Hunter To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , "Pawel Moll" , Mark Rutland , Ian Campbell , Kumar Gala , "Stephen Warren" , Thierry Reding CC: Kevin Hilman , Geert Uytterhoeven , Grygorii Strashko , Lars-Peter Clausen , Linus Walleij , , , , , Jon Hunter Subject: [PATCH V3 07/17] genirq: Ensure IRQ descriptor is valid when setting-up the IRQ Date: Wed, 4 May 2016 17:25:20 +0100 Message-ID: <1462379130-11742-8-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1462379130-11742-1-git-send-email-jonathanh@nvidia.com> References: <1462379130-11742-1-git-send-email-jonathanh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In the function, setup_irq(), we don't check that the descriptor returned from irq_to_desc() is valid before we start using it. For example chip_bus_lock() called from setup_irq(), assumes that the descriptor pointer is valid and doesn't check before dereferencing it. In many other functions including setup/free_percpu_irq() we do check that the descriptor returned is not NULL and therefore add the same test to setup_irq() to ensure the descriptor returned is valid. Signed-off-by: Jon Hunter --- kernel/irq/manage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index b2a93a37f772..eaedeb74b49d 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -1414,7 +1414,7 @@ int setup_irq(unsigned int irq, struct irqaction *act) int retval; struct irq_desc *desc = irq_to_desc(irq); - if (WARN_ON(irq_settings_is_per_cpu_devid(desc))) + if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc))) return -EINVAL; chip_bus_lock(desc); retval = __setup_irq(irq, desc, act);