From patchwork Mon May 9 21:49:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 9050221 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2E5969F372 for ; Mon, 9 May 2016 21:50:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3714B2011E for ; Mon, 9 May 2016 21:50:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7DF8120145 for ; Mon, 9 May 2016 21:50:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753233AbcEIVuQ (ORCPT ); Mon, 9 May 2016 17:50:16 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:50821 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752987AbcEIVuN (ORCPT ); Mon, 9 May 2016 17:50:13 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id u49Lnnir020775; Mon, 9 May 2016 16:49:49 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u49Lnn3h020147; Mon, 9 May 2016 16:49:49 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.224.2; Mon, 9 May 2016 16:49:49 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u49LnnVi027047; Mon, 9 May 2016 16:49:49 -0500 Received: from localhost (uda0274052.am.dhcp.ti.com [128.247.83.19]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id u49Lnm305080; Mon, 9 May 2016 16:49:48 -0500 (CDT) From: Dave Gerlach To: , CC: Tony Lindgren , Dave Gerlach Subject: [PATCH 4/6] ARM: OMAP2+: pm34xx: Convert to use generic sram driver for idle code Date: Mon, 9 May 2016 16:49:24 -0500 Message-ID: <1462830566-28708-5-git-send-email-d-gerlach@ti.com> X-Mailer: git-send-email 2.7.3 In-Reply-To: <1462830566-28708-1-git-send-email-d-gerlach@ti.com> References: <1462830566-28708-1-git-send-email-d-gerlach@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Change to use the generic SRAM driver and genalloc framework to allocate SRAM space for low-level ASM PM code instead of omap specific SRAM allocator. Signed-off-by: Dave Gerlach --- arch/arm/mach-omap2/pm34xx.c | 82 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 81 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index d44e0e2f1106..5ebbf5c30c6e 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -24,17 +24,21 @@ #include #include #include +#include #include #include #include #include +#include #include #include #include +#include #include #include +#include #include #include @@ -68,6 +72,9 @@ static LIST_HEAD(pwrst_list); static int (*_omap_save_secure_sram)(u32 *addr); void (*omap3_do_wfi_sram)(void); +static struct gen_pool *sram_pool; +static phys_addr_t ocmcram_location; +static phys_addr_t secure_ocmcram_location; static struct powerdomain *mpu_pwrdm, *neon_pwrdm; static struct powerdomain *core_pwrdm, *per_pwrdm; @@ -179,6 +186,71 @@ static void omap34xx_save_context(u32 *save) *save++ = val; } +/* + * Push functions to SRAM + * + * The minimum set of functions is pushed to SRAM for execution: + * - omap3_do_wfi for erratum i581 WA, + * - save_secure_ram_context for security extensions. + */ +static int omap3_prepare_push_sram_idle(void) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "ti,omap3-mpu"); + if (!np) { + pr_warn("PM: %s: Unable to find device node for mpu\n", + __func__); + return -ENODEV; + } + + sram_pool = of_gen_pool_get(np, "sram", 0); + + if (!sram_pool) { + pr_warn("PM: %s: Unable to get sram pool for ocmcram\n", + __func__); + return -ENODEV; + } + + ocmcram_location = gen_pool_alloc(sram_pool, omap3_do_wfi_sz); + if (!ocmcram_location) { + pr_warn("PM: %s: Unable to allocate memory from ocmcram for omap3_do_wfi_sz.\n", + __func__); + return -EINVAL; + } + + if (omap_type() != OMAP2_DEVICE_TYPE_GP) { + secure_ocmcram_location = + gen_pool_alloc(sram_pool, + save_secure_ram_context_sz); + if (!secure_ocmcram_location) { + pr_warn("PM: %s: Unable to allocate memory from ocmcram for save_secure_ram_context.\n", + __func__); + return -EINVAL; + } + } + + return 0; +} + +static int omap3_push_sram_idle(void) +{ + omap3_do_wfi_sram = fncpy((void *)ocmcram_location, + &omap3_do_wfi, + omap3_do_wfi_sz); + + return 0; +} + +static int omap3_push_sram_secure_idle(void) +{ + if (omap_type() != OMAP2_DEVICE_TYPE_GP) + _omap_save_secure_sram = fncpy((void *)secure_ocmcram_location, + &save_secure_ram_context, + save_secure_ram_context_sz); + return 0; +} + static int omap34xx_do_sram_idle(unsigned long save_state) { omap34xx_cpu_suspend(save_state); @@ -281,7 +353,8 @@ void omap_sram_idle(void) pwrdm_read_prev_pwrst(core_pwrdm) == PWRDM_POWER_OFF) { omap3_core_restore_context(); omap3_cm_restore_context(); - omap3_sram_restore_context(); + omap3_push_sram_idle(); + omap3_push_sram_secure_idle(); omap2_sms_restore_context(); } else { /* @@ -517,6 +590,13 @@ int __init omap3_pm_init(void) per_clkdm = clkdm_lookup("per_clkdm"); wkup_clkdm = clkdm_lookup("wkup_clkdm"); + ret = omap3_prepare_push_sram_idle(); + if (ret) + goto err3; + + omap3_push_sram_idle(); + omap3_push_sram_secure_idle(); + omap_common_suspend_init(omap3_pm_suspend); arm_pm_idle = omap3_pm_idle;