From patchwork Tue May 10 19:49:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 9061471 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5F733BF29F for ; Tue, 10 May 2016 19:50:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2F2EE201BC for ; Tue, 10 May 2016 19:50:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EA6B720160 for ; Tue, 10 May 2016 19:50:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752746AbcEJTuW (ORCPT ); Tue, 10 May 2016 15:50:22 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:47477 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752092AbcEJTuU (ORCPT ); Tue, 10 May 2016 15:50:20 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id u4AJnmfZ023675; Tue, 10 May 2016 14:49:48 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4AJnmKF017075; Tue, 10 May 2016 14:49:48 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Tue, 10 May 2016 14:49:48 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u4AJnmdA032422; Tue, 10 May 2016 14:49:48 -0500 Received: from localhost (uda0274052.am.dhcp.ti.com [128.247.83.19]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id u4AJnm317535; Tue, 10 May 2016 14:49:48 -0500 (CDT) From: Dave Gerlach To: , , CC: Andreas Dannenberg , Suman Anna , Rob Herring , Mark Rutland , Tony Lindgren , Dave Gerlach Subject: [PATCH 1/2] ARM: dts: dra7: Add ocmcram nodes Date: Tue, 10 May 2016 14:49:41 -0500 Message-ID: <1462909782-14639-2-git-send-email-d-gerlach@ti.com> X-Mailer: git-send-email 2.7.3 In-Reply-To: <1462909782-14639-1-git-send-email-d-gerlach@ti.com> References: <1462909782-14639-1-git-send-email-d-gerlach@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add all ocmcram nodes to dra7.dtsi using the generic mmio-sram driver. DRA7xx and AM57xx families of SoCs can contain three ocmcram regions of SRAM, one of 512kb and also an optional two additional of 1Mb each. Mark the two additional 1MB regions of SRAM as disabled as only ocmcmram1 is on all variants of the SoCs, then depending on which specific variant is in use the ocmcram2 and ocmcram3 nodes can be enabled in the board dts file if the data manual for that part number indicates the ocmcram region is available. Signed-off-by: Dave Gerlach Reviewed-by: Andreas Dannenberg --- arch/arm/boot/dts/dra7.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 13ac88279427..fd6f74856bd3 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -286,6 +286,38 @@ }; }; + ocmcram1: ocmcram@40300000 { + compatible = "mmio-sram"; + reg = <0x40300000 0x80000>; + ranges = <0x0 0x40300000 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + }; + + /* + * NOTE: ocmcram2 and ocmcram3 are not available on all + * DRA7xx and AM57xx variants. Confirm availability in + * the data manual for the exact part number in use + * before enabling these nodes in the board dts file. + */ + ocmcram2: ocmcram@40400000 { + status = "disabled"; + compatible = "mmio-sram"; + reg = <0x40400000 0x100000>; + ranges = <0x0 0x40400000 0x100000>; + #address-cells = <1>; + #size-cells = <1>; + }; + + ocmcram3: ocmcram@40500000 { + status = "disabled"; + compatible = "mmio-sram"; + reg = <0x40500000 0x100000>; + ranges = <0x0 0x40500000 0x100000>; + #address-cells = <1>; + #size-cells = <1>; + }; + bandgap: bandgap@4a0021e0 { reg = <0x4a0021e0 0xc 0x4a00232c 0xc