From patchwork Wed Oct 19 05:33:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "J, KEERTHY" X-Patchwork-Id: 9383613 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DAAB560762 for ; Wed, 19 Oct 2016 05:34:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CE9E828DB1 for ; Wed, 19 Oct 2016 05:34:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C374F28DE4; Wed, 19 Oct 2016 05:34:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5028828DB1 for ; Wed, 19 Oct 2016 05:34:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755666AbcJSFet (ORCPT ); Wed, 19 Oct 2016 01:34:49 -0400 Received: from bear.ext.ti.com ([198.47.19.11]:44198 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754537AbcJSFes (ORCPT ); Wed, 19 Oct 2016 01:34:48 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id u9J5YisZ010035; Wed, 19 Oct 2016 00:34:44 -0500 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u9J5YiZv023360; Wed, 19 Oct 2016 00:34:44 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Wed, 19 Oct 2016 00:34:44 -0500 Received: from ula0393675.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u9J5YQl1017393; Wed, 19 Oct 2016 00:34:41 -0500 From: Keerthy To: CC: , , , , , , , , Subject: [PATCH 4/5] gpio: davinci: Store both irqs into the controller Date: Wed, 19 Oct 2016 11:03:58 +0530 Message-ID: <1476855239-32730-5-git-send-email-j-keerthy@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1476855239-32730-1-git-send-email-j-keerthy@ti.com> References: <1476855239-32730-1-git-send-email-j-keerthy@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP There are 32 GPIOs per controller which means 2 banks with 16 gpios and 2 separate irqs. Hence store the both the irq numbers for the controller which makes it easier to distnguish the bank in irq handler. Signed-off-by: Keerthy --- drivers/gpio/gpio-davinci.c | 8 +++++++- include/linux/platform_data/gpio-davinci.h | 2 ++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 2bc308a..f7c506b 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -326,7 +326,7 @@ static void gpio_irq_handler(struct irq_desc *desc) g = (struct davinci_gpio_regs __iomem *)d->regs; /* we only care about one bank */ - if (irq & 1) + if (irq == d->birq2) mask <<= 16; /* temporarily mask (level sensitive) parent IRQ */ @@ -578,6 +578,12 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev) writel_relaxed(~0, &g->clr_falling); writel_relaxed(~0, &g->clr_rising); + bank_irq = platform_get_irq(pdev, bank); + if (bank % 2) + chips[bank / 2].birq2 = bank_irq; + else + chips[bank / 2].birq1 = bank_irq; + /* * Each chip handles 32 gpios, and each irq bank consists of 16 * gpio irqs. Pass the irq bank's corresponding controller to diff --git a/include/linux/platform_data/gpio-davinci.h b/include/linux/platform_data/gpio-davinci.h index 0a0cdd7..6439b81 100644 --- a/include/linux/platform_data/gpio-davinci.h +++ b/include/linux/platform_data/gpio-davinci.h @@ -39,6 +39,8 @@ struct davinci_gpio_controller { int gpio_unbanked; unsigned gpio_irq; unsigned ctrl_base; + unsigned int birq1; + unsigned int birq2; }; /*