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[213.209.99.202]) by smtp.gmail.com with ESMTPSA id u184sm2128578wmb.29.2017.02.17.07.52.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 17 Feb 2017 07:52:50 -0800 (PST) From: yegorslists@googlemail.com To: linux-can@vger.kernel.org Cc: linux-omap@vger.kernel.org, devicetree@vger.kernel.org, robh@kernel.org, tony@atomide.com, mkl@pengutronix.de, andrej.skvortzov@gmail.com, Yegor Yefremov , Anton Glukhov Subject: [PATCH v5 2/3] can: ti_hecc: Add TI HECC DT binding documentation Date: Fri, 17 Feb 2017 16:52:32 +0100 Message-Id: <1487346753-19286-3-git-send-email-yegorslists@googlemail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1487346753-19286-1-git-send-email-yegorslists@googlemail.com> References: <1487346753-19286-1-git-send-email-yegorslists@googlemail.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Yegor Yefremov DT binding documentation for TI High End CAN Controller Signed-off-by: Anton Glukhov Signed-off-by: Yegor Yefremov Acked-by: Rob Herring --- .../devicetree/bindings/net/can/ti_hecc.txt | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/can/ti_hecc.txt diff --git a/Documentation/devicetree/bindings/net/can/ti_hecc.txt b/Documentation/devicetree/bindings/net/can/ti_hecc.txt new file mode 100644 index 0000000..a7c601e --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/ti_hecc.txt @@ -0,0 +1,33 @@ +Texas Instruments High End CAN Controller (HECC) +================================================ + +This file provides information, what the device node +for the hecc interface contains. + +Required properties: +- compatible: "ti,am3517-hecc" +- reg: addresses and lengths of the register spaces for 'hecc', 'hecc-ram' + and 'mbx' +- reg-names :"hecc", "hecc-ram", "mbx" +- interrupts: interrupt mapping for the hecc interrupts sources +- clocks: clock phandles (see clock bindings for details) + +Optional properties: +- ti,use-hecc1int: if provided configures HECC to produce all interrupts + on HECC1INT interrupt line. By default HECC0INT interrupt + line will be used. +- xceiver-supply: regulator that powers the CAN transceiver + +Example: + +For am3517evm board: + hecc: can@0x5c050000 { + compatible = "ti,am3517-hecc"; + status = "disabled"; + reg = <0x5c050000 0x80>, + <0x5c053000 0x180>, + <0x5c052000 0x200>; + reg-names = "hecc", "hecc-ram", "mbx"; + interrupts = <24>; + clocks = <&hecc_ck>; + };