From patchwork Tue Dec 19 15:24:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 10123437 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3B9746057F for ; Tue, 19 Dec 2017 15:26:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2E36B292CF for ; Tue, 19 Dec 2017 15:26:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 232E029350; Tue, 19 Dec 2017 15:26:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B619F2931F for ; Tue, 19 Dec 2017 15:25:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752744AbdLSPZy (ORCPT ); Tue, 19 Dec 2017 10:25:54 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:32602 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751805AbdLSPZw (ORCPT ); Tue, 19 Dec 2017 10:25:52 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBJFPMiK015006; Tue, 19 Dec 2017 09:25:22 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513697122; bh=447obyq/Sw8HsrqBzbrHVwFQcFoRxxO7qUlV2dHO+4A=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=oy/FL7E77bkOJY2pZEY/8Y7uqITSbhvmQTxi0wM5TPfHk441Zq9AhXwJ1KROX85Ad SHlcFx4ja2wzMa6IdTw+gLSiUFR8SFy91vc2ho3QvixCtLNprZ6N6K4P9UTap2wc+0 Vkamm1wUme69SkmOg9nKlp2bQerN+C/OCSrrG9vA= Received: from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBJFPMBH012725; Tue, 19 Dec 2017 09:25:22 -0600 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Tue, 19 Dec 2017 09:25:22 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Tue, 19 Dec 2017 09:25:22 -0600 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBJFPMcV025896; Tue, 19 Dec 2017 09:25:22 -0600 Received: from localhost (uda0274052.dhcp.ti.com [128.247.59.203]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id vBJFPLx00865; Tue, 19 Dec 2017 09:25:21 -0600 (CST) From: Dave Gerlach To: Tony Lindgren CC: , , , Nishanth Menon , Dave Gerlach Subject: [PATCH 3/8] ARM: dts: dra7: Enable 1.5 GHz operation for the CPU Date: Tue, 19 Dec 2017 09:24:21 -0600 Message-ID: <1513697066-27732-4-git-send-email-d-gerlach@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1513697066-27732-1-git-send-email-d-gerlach@ti.com> References: <1513697066-27732-1-git-send-email-d-gerlach@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP After ti-opp-supply driver is in place to provide AVS Class0 and abb regulator scaling support let's enable 1.5GHz for the cpu. Signed-off-by: Dave Gerlach --- arch/arm/boot/dts/dra7.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 33004e7f1ee9..eb68da74f777 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -116,6 +116,13 @@ opp-supported-hw = <0xFF 0x02>; }; + + opp_high@1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <1210000 950000 1250000>, + <1210000 950000 1250000>; + opp-supported-hw = <0xFF 0x04>; + }; }; /*