@@ -404,3 +404,10 @@
phys = <&pcie1_phy>, <&pcie2_phy>;
phy-names = "pcie-phy0", "pcie-phy1";
};
+
+&m_can0 {
+ status = "okay";
+ can-transceiver {
+ max-bitrate = <5000000>;
+ };
+};
@@ -11,6 +11,23 @@
/ {
compatible = "ti,dra762", "ti,dra7";
+ ocp {
+ m_can0: mcan@42C01A00 {
+ compatible = "bosch,m_can";
+ reg = <0x42C01A00 0x4000>, <0x42C00000 0x18FC>;
+ reg-names = "m_can", "message_ram";
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ ti,hwmods = "mcan";
+ clocks = <&mcan_clk>, <&l3_iclk_div>;
+ clock-names = "cclk", "hclk";
+ bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
+ status = "disabled";
+ };
+ };
+
};
/* MCAN interrupts are hard-wired to irqs 67, 68 */