@@ -44,6 +44,7 @@ extern int set_pwrdm_state(struct powerdomain
*pwrdm, u32 state);
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
extern void omap3_set_prm_setup_vc(struct prm_setup_vc *setup_vc);
+extern int omap3_vc_bypass_cmd(u8 slave_addr, u8 reg_addr, u8 cmd);
#ifdef CONFIG_CPU_IDLE
int omap3_idle_init(void);
@@ -26,6 +26,7 @@
#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/clk.h>
+#include <linux/delay.h>
#include <mach/sram.h>
#include <mach/prcm.h>
@@ -1135,6 +1136,41 @@ err2:
return ret;
}
+/* Program Power IC via OMAP3 voltage controller bypass interface */
+int omap3_vc_bypass_cmd(u8 slave_addr, u8 reg_addr, u8 cmd)
+{
+ u32 vc_bypass_value;
+ u32 loop_cnt = 0, retries_cnt = 0;
+
+ vc_bypass_value = (cmd << OMAP3430_DATA_SHIFT) |
+ (reg_addr << OMAP3430_REGADDR_SHIFT) |
+ (slave_addr << OMAP3430_SLAVEADDR_SHIFT);
+
+ prm_write_mod_reg(vc_bypass_value, OMAP3430_GR_MOD,
+ OMAP3_PRM_VC_BYPASS_VAL_OFFSET);
+
+ vc_bypass_value = prm_set_mod_reg_bits(OMAP3430_VALID, OMAP3430_GR_MOD,
+ OMAP3_PRM_VC_BYPASS_VAL_OFFSET);
+
+ while ((vc_bypass_value & OMAP3430_VALID) != 0x0) {
+ loop_cnt++;
+ if (retries_cnt > 10) {
+ printk(KERN_ERR"Loop count exceeded in check SR I2C"
+ "write\n");
+ return 1;
+ }
+ if (loop_cnt > 50) {
+ retries_cnt++;
+ loop_cnt = 0;
+ udelay(10);
+ }
+ vc_bypass_value = prm_read_mod_reg(OMAP3430_GR_MOD,
+ OMAP3_PRM_VC_BYPASS_VAL_OFFSET);
+ }
+
+ return 0;
+}
+
static void __init configure_vc(void)
{
b/arch/arm/mach-omap2/smartreflex.c
@@ -35,6 +35,7 @@
#include "prm.h"
#include "smartreflex.h"
#include "prm-regbits-34xx.h"
+#include "pm.h"
struct omap_sr {
int srid;
@@ -449,8 +450,6 @@ static int sr_reset_voltage(int srid)
{
u32 target_opp_no, vsel = 0;
u32 reg_addr = 0;
- u32 loop_cnt = 0, retries_cnt = 0;
- u32 vc_bypass_value;
u32 t2_smps_steps = 0;
u32 t2_smps_delay = 0;
u32 prm_vp1_voltage, prm_vp2_voltage;
@@ -479,31 +478,8 @@ static int sr_reset_voltage(int srid)
t2_smps_steps = abs(vsel - prm_vp2_voltage);
}
- vc_bypass_value = (vsel << OMAP3430_DATA_SHIFT) |
- (reg_addr << OMAP3430_REGADDR_SHIFT) |
- (R_SRI2C_SLAVE_ADDR << OMAP3430_SLAVEADDR_SHIFT);
-
- prm_write_mod_reg(vc_bypass_value, OMAP3430_GR_MOD,
- OMAP3_PRM_VC_BYPASS_VAL_OFFSET);
-
- vc_bypass_value = prm_set_mod_reg_bits(OMAP3430_VALID, OMAP3430_GR_MOD,
- OMAP3_PRM_VC_BYPASS_VAL_OFFSET);
-
- while ((vc_bypass_value & OMAP3430_VALID) != 0x0) {
- loop_cnt++;
- if (retries_cnt > 10) {
- pr_info("Loop count exceeded in check SR I2C"
- "write\n");
- return 1;
- }
- if (loop_cnt > 50) {
- retries_cnt++;
- loop_cnt = 0;
- udelay(10);
- }
- vc_bypass_value = prm_read_mod_reg(OMAP3430_GR_MOD,
- OMAP3_PRM_VC_BYPASS_VAL_OFFSET);
- }
+ if (omap3_vc_bypass_cmd(R_SRI2C_SLAVE_ADDR, reg_addr, vsel))
+ return 1;
/*
* T2 SMPS slew rate (min) 4mV/uS, step size 12.5mV,
@@ -780,9 +756,7 @@ int sr_voltagescale_vcbypass(u32 target_opp, u32
current_opp,
{
int sr_status = 0;
u32 vdd, target_opp_no, current_opp_no;
- u32 vc_bypass_value;
u32 reg_addr = 0;
- u32 loop_cnt = 0, retries_cnt = 0;
u32 t2_smps_steps = 0;
u32 t2_smps_delay = 0;