@@ -871,6 +871,36 @@ struct clk *omap2_clk_get_parent(struct clk *clk)
return clk->parent;
}
+/**
+ * omap2_clk_round_rate_parent - return the rate for @clk if parent were changed
+ * @clk: struct clk that may change parents
+ * @new_parent: the struct clk that @clk may be reparented under
+ *
+ * Given a struct clk @clk and a new parent struct clk @new_parent,
+ * determine what @clk's rate would be after the reparent operation.
+ * Returns the new clock rate or -EINVAL upon error.
+ */
+long omap2_clk_round_rate_parent(struct clk *clk, struct clk *new_parent)
+{
+ u32 field_val, parent_div;
+ long rate;
+
+ if (!clk->clksel || !new_parent)
+ return -EINVAL;
+
+ parent_div = _omap2_clksel_get_src_field(new_parent, clk, &field_val);
+ if (!parent_div)
+ return -EINVAL;
+
+ /* CLKSEL clocks follow their parents' rates, divided by a divisor */
+ rate = new_parent->rate;
+ if (parent_div > 0)
+ rate /= parent_div;
+
+ return rate;
+}
+
+
/* DPLL rate rounding code */
/**
@@ -41,6 +41,7 @@ int omap2_clk_register(struct clk *clk);
int omap2_clk_enable(struct clk *clk);
void omap2_clk_disable(struct clk *clk);
long omap2_clk_round_rate(struct clk *clk, unsigned long rate);
+long omap2_clk_round_rate_parent(struct clk *clk, struct clk *new_parent);
int omap2_clk_set_rate(struct clk *clk, unsigned long rate);
int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent);
int omap2_dpll_set_rate_tolerance(struct clk *clk, unsigned int tolerance);
@@ -448,6 +448,7 @@ static struct clk_functions omap2_clk_functions = {
.clk_enable = omap2_clk_enable,
.clk_disable = omap2_clk_disable,
.clk_round_rate = omap2_clk_round_rate,
+ .clk_round_rate_parent = omap2_clk_round_rate_parent,
.clk_set_rate = omap2_clk_set_rate,
.clk_set_parent = omap2_clk_set_parent,
.clk_get_parent = omap2_clk_get_parent,
@@ -635,6 +635,7 @@ static struct clk_functions omap2_clk_functions = {
.clk_enable = omap2_clk_enable,
.clk_disable = omap2_clk_disable,
.clk_round_rate = omap2_clk_round_rate,
+ .clk_round_rate_parent = omap2_clk_round_rate_parent,
.clk_set_rate = omap2_clk_set_rate,
.clk_set_parent = omap2_clk_set_parent,
.clk_get_parent = omap2_clk_get_parent,
@@ -121,6 +121,8 @@ struct clk_functions {
int (*clk_enable)(struct clk *clk);
void (*clk_disable)(struct clk *clk);
long (*clk_round_rate)(struct clk *clk, unsigned long rate);
+ long (*clk_round_rate_parent)(struct clk *clk,
+ struct clk *parent);
int (*clk_set_rate)(struct clk *clk, unsigned long rate);
int (*clk_set_parent)(struct clk *clk, struct clk *parent);
struct clk * (*clk_get_parent)(struct clk *clk);
This patch adds clk_round_rate_parent(), a means for internal clock code to determine what a clock's rate would be if its parent changed. This is needed by the pre-change clock notifier, which passes the current clock rate and the desired clock rate to its callbacks. An implementation is provided for the OMAP2/3 architecture (omap2_clk_round_rate_parent).. Signed-off-by: Paul Walmsley <paul@pwsan.com> --- arch/arm/mach-omap2/clock.c | 30 ++++++++++++++++++++++++++++++ arch/arm/mach-omap2/clock.h | 1 + arch/arm/mach-omap2/clock24xx.c | 1 + arch/arm/mach-omap2/clock34xx.c | 1 + arch/arm/plat-omap/include/mach/clock.h | 2 ++ 5 files changed, 35 insertions(+), 0 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html