From patchwork Wed Jul 1 11:27:28 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Tuukka.O Toivonen" X-Patchwork-Id: 33454 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n61BSAjk023877 for ; Wed, 1 Jul 2009 11:28:10 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755041AbZGAL1q (ORCPT ); Wed, 1 Jul 2009 07:27:46 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755874AbZGAL1q (ORCPT ); Wed, 1 Jul 2009 07:27:46 -0400 Received: from smtp.nokia.com ([192.100.122.233]:46630 "EHLO mgw-mx06.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755675AbZGAL1o (ORCPT ); Wed, 1 Jul 2009 07:27:44 -0400 Received: from vaebh106.NOE.Nokia.com (vaebh106.europe.nokia.com [10.160.244.32]) by mgw-mx06.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id n61BRPmm020194; Wed, 1 Jul 2009 14:27:35 +0300 Received: from esebh102.NOE.Nokia.com ([172.21.138.183]) by vaebh106.NOE.Nokia.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 1 Jul 2009 14:27:33 +0300 Received: from mgw-sa01.ext.nokia.com ([147.243.1.47]) by esebh102.NOE.Nokia.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Wed, 1 Jul 2009 14:27:33 +0300 Received: from ouped119194.nmp.nokia.com (ouped119194.nmp.nokia.com [172.23.119.194]) by mgw-sa01.ext.nokia.com (Switch-3.2.6/Switch-3.2.6) with ESMTP id n61BRUqi027841; Wed, 1 Jul 2009 14:27:31 +0300 From: "Tuukka.O Toivonen" Organization: Nokia To: Paul Walmsley Subject: [PATCH] ARM: OMAP3: allow setting cam_mclk rate Date: Wed, 1 Jul 2009 14:27:28 +0300 User-Agent: KMail/1.9.10 Cc: sailus@maxwell.research.nokia.com, camera@ok.research.nokia.com, "Cohen David.A (Nokia-D/Helsinki)" , "Hurskainen Mikko (Nokia-D/Helsinki)" , "core-review@ok.research.nokia.com" , linux-omap@vger.kernel.org MIME-Version: 1.0 Content-Disposition: inline Message-Id: <200907011427.29318.tuukka.o.toivonen@nokia.com> X-OriginalArrivalTime: 01 Jul 2009 11:27:33.0603 (UTC) FILETIME=[ED7C4330:01C9FA3E] X-Nokia-AV: Clean Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org This patch allows drivers to modify cam_mclk rate which is used for generating external cam_xclka and cam_xclkb for cameras. Signed-off-by: Tuukka Toivonen --- arch/arm/mach-omap2/clock34xx.c | 18 ++++++++++++++++++ arch/arm/mach-omap2/clock34xx.h | 2 ++ 2 files changed, 20 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 045da92..667a608 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -898,6 +898,24 @@ static unsigned long omap3_clkoutx2_recalc(struct clk *clk) return rate; } +/* Clock control for OMAP3 camera */ + +static int omap3_cam_mclk_set_rate(struct clk *clk, unsigned long rate) +{ + const unsigned int dpll4_rate = 864000000; /* Hz */ + int clksel; + + if (rate <= 0) + return -EINVAL; + + clksel = (dpll4_rate + (rate>>1)) / rate; + clksel = clamp(clksel, 1, 16); + cm_write_mod_reg(clksel, OMAP3430_CAM_MOD, CM_CLKSEL); + clk->rate = dpll4_rate / clksel; + + return 0; +} + /* Common clock code */ /* diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index e433aec..bd09709 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -37,6 +37,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk); static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate); static int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate); static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate); +static int omap3_cam_mclk_set_rate(struct clk *clk, unsigned long rate); /* Maximum DPLL multiplier, divider values for OMAP3 */ #define OMAP3_MAX_DPLL_MULT 2048 @@ -2342,6 +2343,7 @@ static struct clk uart3_fck = { .enable_bit = OMAP3430_EN_UART3_SHIFT, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, + .set_rate = &omap3_cam_mclk_set_rate, }; static struct clk gpt2_fck = {