From patchwork Sat Dec 19 03:46:44 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 68904 X-Patchwork-Delegate: tony@atomide.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id nBJ3kcu3007502 for ; Sat, 19 Dec 2009 03:46:48 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755257AbZLSDqr (ORCPT ); Fri, 18 Dec 2009 22:46:47 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755254AbZLSDqr (ORCPT ); Fri, 18 Dec 2009 22:46:47 -0500 Received: from mho-02-ewr.mailhop.org ([204.13.248.72]:55843 "EHLO mho-02-ewr.mailhop.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755251AbZLSDqq (ORCPT ); Fri, 18 Dec 2009 22:46:46 -0500 Received: from c-67-160-239-110.hsd1.ca.comcast.net ([67.160.239.110] helo=[127.0.0.1]) by mho-02-ewr.mailhop.org with esmtpa (Exim 4.68) (envelope-from ) id 1NLqHF-0000m7-KU; Sat, 19 Dec 2009 03:46:45 +0000 X-Mail-Handler: MailHop Outbound by DynDNS X-Originating-IP: 67.160.239.110 X-Report-Abuse-To: abuse@dyndns.com (see http://www.dyndns.com/services/mailhop/outbound_abuse.html for abuse reporting information) X-MHO-User: U2FsdGVkX18k2SKO6fppqloB4saxBGWQ Subject: [PATCH 5/5] arm: Fix typo in cacheflush.h and remove unnecessary comments To: linux-arm-kernel@lists.infradead.org From: Tony Lindgren Cc: linux-omap@vger.kernel.org Date: Fri, 18 Dec 2009 19:46:44 -0800 Message-ID: <20091219034644.26198.28856.stgit@localhost> In-Reply-To: <20091219034151.26198.26570.stgit@localhost> References: <20091219034151.26198.26570.stgit@localhost> User-Agent: StGit/0.15-6-gbbd0 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 730aefc..e9fb1d3 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h @@ -154,7 +154,7 @@ * Please note that the implementation of these, and the required * effects are cache-type (VIVT/VIPT/PIPT) specific. * - * flush_cache_kern_all() + * flush_cache_all() * * Unconditionally clean and invalidate the entire cache. * diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 395cc90..7a5337e 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -59,8 +59,6 @@ ENTRY(cpu_v6_proc_fin) * to what would be the reset vector. * * - loc - location to jump to for soft reset - * - * It is assumed that: */ .align 5 ENTRY(cpu_v6_reset) diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index d2a8074..7aaf88a 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -63,8 +63,6 @@ ENDPROC(cpu_v7_proc_fin) * to what would be the reset vector. * * - loc - location to jump to for soft reset - * - * It is assumed that: */ .align 5 ENTRY(cpu_v7_reset)