From patchwork Tue May 4 07:40:06 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 96684 X-Patchwork-Delegate: tony@atomide.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o447fKtJ002514 for ; Tue, 4 May 2010 07:41:20 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756771Ab0EDHlS (ORCPT ); Tue, 4 May 2010 03:41:18 -0400 Received: from smtp.nokia.com ([192.100.122.233]:31018 "EHLO mgw-mx06.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751923Ab0EDHlR (ORCPT ); Tue, 4 May 2010 03:41:17 -0400 Received: from esebh106.NOE.Nokia.com (esebh106.ntc.nokia.com [172.21.138.213]) by mgw-mx06.nokia.com (Switch-3.3.3/Switch-3.3.3) with ESMTP id o447evGf029294; Tue, 4 May 2010 10:41:13 +0300 Received: from esebh102.NOE.Nokia.com ([172.21.138.183]) by esebh106.NOE.Nokia.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 4 May 2010 10:41:05 +0300 Received: from mgw-da01.ext.nokia.com ([147.243.128.24]) by esebh102.NOE.Nokia.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.3959); Tue, 4 May 2010 10:41:04 +0300 Received: from esdhcp04058.research.nokia.com (esdhcp04158.research.nokia.com [172.21.41.58]) by mgw-da01.ext.nokia.com (Switch-3.3.3/Switch-3.3.3) with SMTP id o447f1wJ000962; Tue, 4 May 2010 10:41:02 +0300 Date: Tue, 4 May 2010 10:40:06 +0300 From: Mika Westerberg To: ext Tony Lindgren Cc: "linux-omap@vger.kernel.org" Subject: Re: [PATCH] OMAP2/3/4: DMA: reset controller during init Message-ID: <20100504074006.GK12682@esdhcp04058.research.nokia.com> References: <1272891357-27400-1-git-send-email-ext-mika.1.westerberg@nokia.com> <20100503165817.GR29604@atomide.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20100503165817.GR29604@atomide.com> User-Agent: Mutt/1.5.18 (2008-05-17) X-OriginalArrivalTime: 04 May 2010 07:41:04.0600 (UTC) FILETIME=[26A03580:01CAEB5D] X-Nokia-AV: Clean Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Tue, 04 May 2010 07:41:20 +0000 (UTC) diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 1d95996..ad42ec3 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -709,6 +709,21 @@ static inline void omap2_enable_irq_lch(int lch) spin_unlock_irqrestore(&dma_chan_lock, flags); } +static inline void omap2_disable_irq_lch(int lch) +{ + u32 val; + unsigned long flags; + + if (!cpu_class_is_omap2()) + return; + + spin_lock_irqsave(&dma_chan_lock, flags); + val = dma_read(IRQENABLE_L0); + val &= ~(1 << lch); + dma_write(val, IRQENABLE_L0); + spin_unlock_irqrestore(&dma_chan_lock, flags); +} + int omap_request_dma(int dev_id, const char *dev_name, void (*callback)(int lch, u16 ch_status, void *data), void *data, int *dma_ch_out) @@ -807,14 +822,7 @@ void omap_free_dma(int lch) } if (cpu_class_is_omap2()) { - u32 val; - - spin_lock_irqsave(&dma_chan_lock, flags); - /* Disable interrupts */ - val = dma_read(IRQENABLE_L0); - val &= ~(1 << lch); - dma_write(val, IRQENABLE_L0); - spin_unlock_irqrestore(&dma_chan_lock, flags); + omap2_disable_irq_lch(lch); /* Clear the CSR register and IRQ status register */ dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch)); @@ -2107,6 +2115,9 @@ static int __init omap_init_dma(void) for (ch = 0; ch < dma_chan_count; ch++) { omap_clear_dma(ch); + if (cpu_class_is_omap2()) + omap2_disable_irq_lch(ch); + dma_chan[ch].dev_id = -1; dma_chan[ch].next_lch = -1;