From patchwork Tue Nov 30 13:23:55 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 366821 X-Patchwork-Delegate: tony@atomide.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oAUDOMts010689 for ; Tue, 30 Nov 2010 13:24:27 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751644Ab0K3NYU (ORCPT ); Tue, 30 Nov 2010 08:24:20 -0500 Received: from smtp.nokia.com ([147.243.128.24]:39218 "EHLO mgw-da01.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750908Ab0K3NYU (ORCPT ); Tue, 30 Nov 2010 08:24:20 -0500 Received: from nokia.com (localhost [127.0.0.1]) by mgw-da01.nokia.com (Switch-3.4.3/Switch-3.4.3) with ESMTP id oAUDOImO005183; Tue, 30 Nov 2010 15:24:18 +0200 Received: from ahunter-work.research.nokia.com ([essapo-nirac25244.europe.nokia.com [10.162.252.44]]) by mgw-da01.nokia.com with RELAY id oAUDNtUb004080 ; Tue, 30 Nov 2010 15:23:58 +0200 From: Adrian Hunter To: Tony Lindgren Cc: Santosh Shilimkar , Manjunatha GK , Adrian Hunter , linux-omap Mailing List Date: Tue, 30 Nov 2010 15:23:55 +0200 Message-Id: <20101130132355.13286.77389.sendpatchset@ahunter-work.research.nokia.com> In-Reply-To: <20101130132341.13286.25157.sendpatchset@ahunter-work.research.nokia.com> References: <20101130132341.13286.25157.sendpatchset@ahunter-work.research.nokia.com> Subject: [PATCH 2/2] OMAP: DMA: clear interrupt status correctly X-Nokia-AV: Clean Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Tue, 30 Nov 2010 13:24:27 +0000 (UTC) diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 6158c99..3300e67 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -49,7 +49,7 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED }; #endif #define OMAP_DMA_ACTIVE 0x01 -#define OMAP2_DMA_CSR_CLEAR_MASK 0xffe +#define OMAP2_DMA_CSR_CLEAR_MASK 0xffffffff #define OMAP_FUNC_MUX_ARM_BASE (0xfffe1000 + 0xec) @@ -2010,7 +2010,7 @@ static int omap2_dma_handle_ch(int ch) printk(KERN_INFO "DMA misaligned error with device %d\n", dma_chan[ch].dev_id); - dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(ch)); + dma_write(status, CSR(ch)); dma_write(1 << ch, IRQSTATUS_L0); /* read back the register to flush the write */ dma_read(IRQSTATUS_L0); @@ -2030,10 +2030,9 @@ static int omap2_dma_handle_ch(int ch) OMAP_DMA_CHAIN_INCQHEAD(chain_id); status = dma_read(CSR(ch)); + dma_write(status, CSR(ch)); } - dma_write(status, CSR(ch)); - if (likely(dma_chan[ch].callback != NULL)) dma_chan[ch].callback(ch, status, dma_chan[ch].data);