From patchwork Tue Mar 1 12:35:43 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 598931 X-Patchwork-Delegate: me@felipebalbi.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p21CZsoT020778 for ; Tue, 1 Mar 2011 12:35:54 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754310Ab1CAMfu (ORCPT ); Tue, 1 Mar 2011 07:35:50 -0500 Received: from na3sys009aog102.obsmtp.com ([74.125.149.69]:56351 "EHLO na3sys009aog102.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754051Ab1CAMft (ORCPT ); Tue, 1 Mar 2011 07:35:49 -0500 Received: from source ([209.85.214.53]) (using TLSv1) by na3sys009aob102.postini.com ([74.125.148.12]) with SMTP ID DSNKTWzoI15bzhqk2OgJXhcOXEnXsHYENl/q@postini.com; Tue, 01 Mar 2011 04:35:48 PST Received: by bwg12 with SMTP id 12so8209536bwg.40 for ; Tue, 01 Mar 2011 04:35:46 -0800 (PST) Received: by 10.204.7.3 with SMTP id b3mr2100296bkb.12.1298982945761; Tue, 01 Mar 2011 04:35:45 -0800 (PST) Received: from localhost (cs181221087.pp.htv.fi [82.181.221.87]) by mx.google.com with ESMTPS id w3sm3303294bkt.17.2011.03.01.04.35.44 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 01 Mar 2011 04:35:45 -0800 (PST) Date: Tue, 1 Mar 2011 14:35:43 +0200 From: Felipe Balbi To: Keshava Munegowda Cc: balbi@ti.com, linux-usb@vger.kernel.org, linux-omap@vger.kernel.org, Anand Gadiyar , Partha Basak Subject: Re: [PATCH 04/10 v1] arm: omap: usb: create common enums and structures for ehci and ohci Message-ID: <20110301123543.GY2942@legolas.emea.dhcp.ti.com> Reply-To: balbi@ti.com References: <1298910712-2051-1-git-send-email-keshava_mgowda@ti.com> <1298910712-2051-2-git-send-email-keshava_mgowda@ti.com> <1298910712-2051-3-git-send-email-keshava_mgowda@ti.com> <1298910712-2051-4-git-send-email-keshava_mgowda@ti.com> <1298910712-2051-5-git-send-email-keshava_mgowda@ti.com> <20110301104940.GS2942@legolas.emea.dhcp.ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-06-14) Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 01 Mar 2011 12:35:54 +0000 (UTC) diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index f784ceb..d7e223b 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -195,7 +195,11 @@ struct ehci_hcd_omap { struct clk *xclk60mhsp1_ck; struct clk *xclk60mhsp2_ck; struct clk *utmi_p1_fck; + struct clk *usbhost_p1_fck; + struct clk *usbtll_p1_fck; struct clk *utmi_p2_fck; + struct clk *usbhost_p2_fck; + struct clk *usbtll_p2_fck; /* FIXME the following two workarounds are * board specific not silicon-specific so these @@ -410,6 +414,50 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd) } break; case EHCI_HCD_OMAP_MODE_TLL: + omap->xclk60mhsp1_ck = clk_get(omap->dev, + "init_60m_fclk"); + if (IS_ERR(omap->xclk60mhsp1_ck)) { + ret = PTR_ERR(omap->xclk60mhsp1_ck); + dev_err(omap->dev, + "Unable to get Port1 ULPI clock\n"); + } + + omap->utmi_p1_fck = clk_get(omap->dev, + "utmi_p1_gfclk"); + if (IS_ERR(omap->utmi_p1_fck)) { + ret = PTR_ERR(omap->utmi_p1_fck); + dev_err(omap->dev, + "Unable to get utmi_p1_fck\n"); + } + + ret = clk_set_parent(omap->utmi_p1_fck, + omap->xclk60mhsp1_ck); + if (ret != 0) { + dev_err(omap->dev, + "Unable to set P1 f-clock\n"); + } + + omap->usbhost_p1_fck = clk_get(omap->dev, + "usb_host_hs_utmi_p1_clk"); + if (IS_ERR(omap->usbhost_p1_fck)) { + ret = PTR_ERR(omap->usbhost_p1_fck); + dev_err(omap->dev, + "Unable to get HOST PORT 1 clk\n"); + } else { + clk_enable(omap->usbhost_p1_fck); + } + + omap->usbtll_p1_fck = clk_get(omap->dev, + "usb_tll_hs_usb_ch0_clk"); + + if (IS_ERR(omap->usbtll_p1_fck)) { + ret = PTR_ERR(omap->usbtll_p1_fck); + dev_err(omap->dev, + "Unable to get TLL CH0 clk\n"); + } else { + clk_enable(omap->usbtll_p1_fck); + } + break; /* TODO */ default: break; @@ -440,6 +488,50 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd) } break; case EHCI_HCD_OMAP_MODE_TLL: + omap->xclk60mhsp2_ck = clk_get(omap->dev, + "init_60m_fclk"); + if (IS_ERR(omap->xclk60mhsp2_ck)) { + ret = PTR_ERR(omap->xclk60mhsp2_ck); + dev_err(omap->dev, + "Unable to get Port2 ULPI clock\n"); + } + + omap->utmi_p2_fck = clk_get(omap->dev, + "utmi_p2_gfclk"); + if (IS_ERR(omap->utmi_p2_fck)) { + ret = PTR_ERR(omap->utmi_p2_fck); + dev_err(omap->dev, + "Unable to get utmi_p2_fck\n"); + } + + ret = clk_set_parent(omap->utmi_p2_fck, + omap->xclk60mhsp2_ck); + if (ret != 0) { + dev_err(omap->dev, + "Unable to set P2 f-clock\n"); + } + + omap->usbhost_p2_fck = clk_get(omap->dev, + "usb_host_hs_utmi_p2_clk"); + if (IS_ERR(omap->usbhost_p2_fck)) { + ret = PTR_ERR(omap->usbhost_p2_fck); + dev_err(omap->dev, + "Unable to get HOST PORT 2 clk\n"); + } else { + clk_enable(omap->usbhost_p2_fck); + } + + omap->usbtll_p2_fck = clk_get(omap->dev, + "usb_tll_hs_usb_ch1_clk"); + + if (IS_ERR(omap->usbtll_p2_fck)) { + ret = PTR_ERR(omap->usbtll_p2_fck); + dev_err(omap->dev, + "Unable to get TLL CH1 clk\n"); + } else { + clk_enable(omap->usbtll_p2_fck); + } + break; /* TODO */ default: break; @@ -602,6 +694,24 @@ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd) return 0; err_sys_status: + + if (omap->usbtll_p2_fck != NULL) { + clk_disable(omap->usbtll_p2_fck); + clk_put(omap->usbtll_p2_fck); + } + if (omap->usbhost_p2_fck != NULL) { + clk_disable(omap->usbhost_p2_fck); + clk_put(omap->usbhost_p2_fck); + } + if (omap->usbtll_p1_fck != NULL) { + clk_disable(omap->usbtll_p1_fck); + clk_put(omap->usbtll_p1_fck); + } + if (omap->usbhost_p1_fck != NULL) { + clk_disable(omap->usbhost_p1_fck); + clk_put(omap->usbhost_p1_fck); + } + clk_disable(omap->utmi_p2_fck); clk_put(omap->utmi_p2_fck); clk_disable(omap->xclk60mhsp2_ck); @@ -740,6 +850,30 @@ static void omap_stop_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd) clk_put(omap->utmi_p2_fck); omap->utmi_p2_fck = NULL; } + + if (omap->usbtll_p2_fck != NULL) { + clk_disable(omap->usbtll_p2_fck); + clk_put(omap->usbtll_p2_fck); + omap->usbtll_p2_fck = NULL; + } + + if (omap->usbhost_p2_fck != NULL) { + clk_disable(omap->usbhost_p2_fck); + clk_put(omap->usbhost_p2_fck); + omap->usbhost_p2_fck = NULL; + } + + if (omap->usbtll_p1_fck != NULL) { + clk_disable(omap->usbtll_p1_fck); + clk_put(omap->usbtll_p1_fck); + omap->usbtll_p1_fck = NULL; + } + + if (omap->usbhost_p1_fck != NULL) { + clk_disable(omap->usbhost_p1_fck); + clk_put(omap->usbhost_p1_fck); + omap->usbhost_p1_fck = NULL; + } } if (omap->phy_reset) {