@@ -141,6 +141,7 @@ static inline int omap2_i2c_add_bus(int bus_id)
struct omap_device *od;
char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
struct omap_i2c_bus_platform_data *pdata;
+ struct omap_i2c_dev_attr *dev_attr;
omap2_i2c_mux_pins(bus_id);
@@ -156,10 +157,14 @@ static inline int omap2_i2c_add_bus(int bus_id)
pdata = &i2c_pdata[bus_id - 1];
/*
* pass the hwmod class's CPU-specific knowledge of I2C IP revision in
- * use up to the OMAP I2C driver via platform data
+ * use, and functionality implementation flags, up to the OMAP I2C
+ * driver via platform data
*/
pdata->rev = oh->class->rev;
+ dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
+ pdata->flags = dev_attr->flags;
+
/*
* When waiting for completion of a i2c transfer, we need to
* set a wake up latency constraint for the MPU. This is to