From patchwork Mon Mar 28 22:21:47 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Lindgren X-Patchwork-Id: 670192 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p2SMLlWI023409 for ; Mon, 28 Mar 2011 22:21:50 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932089Ab1C1WVt (ORCPT ); Mon, 28 Mar 2011 18:21:49 -0400 Received: from mho-01-ewr.mailhop.org ([204.13.248.71]:20708 "EHLO mho-01-ewr.mailhop.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932073Ab1C1WVt (ORCPT ); Mon, 28 Mar 2011 18:21:49 -0400 Received: from c-98-234-237-12.hsd1.ca.comcast.net ([98.234.237.12] helo=baageli.muru.com) by mho-01-ewr.mailhop.org with esmtpa (Exim 4.72) (envelope-from ) id 1Q4KVr-000BgF-Mp; Mon, 28 Mar 2011 22:02:15 +0000 X-Mail-Handler: MailHop Outbound by DynDNS X-Originating-IP: 98.234.237.12 X-Report-Abuse-To: abuse@dyndns.com (see http://www.dyndns.com/services/mailhop/outbound_abuse.html for abuse reporting information) X-MHO-User: U2FsdGVkX184bMsCi9dshC3eydmMDzvW Subject: [PATCH 08/10] omap2+: Use dmtimer macros for clocksource To: linux-arm-kernel@lists.infradead.org From: Tony Lindgren Cc: linux-omap@vger.kernel.org Date: Mon, 28 Mar 2011 15:21:47 -0700 Message-ID: <20110328222147.4046.76646.stgit@baageli.muru.com> In-Reply-To: <20110328221501.4046.41079.stgit@baageli.muru.com> References: <20110328221501.4046.41079.stgit@baageli.muru.com> User-Agent: StGit/0.15 MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 28 Mar 2011 22:21:50 +0000 (UTC) diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 5e8fa1e..afb9041 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c @@ -256,20 +256,22 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, * sync counter. See clocksource setup in plat-omap/counter_32k.c */ -static void __init omap2_gp_clocksource_init(void) +static void __init omap2_gp_clocksource_init(int unused, const char *dummy) { omap_init_clocksource_32k(); } #else + +static struct omap_dm_timer clksrc; + /* * clocksource */ static DEFINE_CLOCK_DATA(cd); -static struct omap_dm_timer *gpt_clocksource; static cycle_t clocksource_read_cycles(struct clocksource *cs) { - return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource); + return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); } static struct clocksource clocksource_gpt = { @@ -284,35 +286,39 @@ static void notrace dmtimer_update_sched_clock(void) { u32 cyc; - cyc = omap_dm_timer_read_counter(gpt_clocksource); + cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); update_sched_clock(&cd, cyc, (u32)~0); } -/* Setup free-running counter for clocksource */ -static void __init omap2_gp_clocksource_init(void) +unsigned long long notrace sched_clock(void) { - static struct omap_dm_timer *gpt; - u32 tick_rate; - static char err1[] __initdata = KERN_ERR - "%s: failed to request dm-timer\n"; - static char err2[] __initdata = KERN_ERR - "%s: can't register clocksource!\n"; + u32 cyc = 0; - gpt = omap_dm_timer_request(); - if (!gpt) - printk(err1, clocksource_gpt.name); - gpt_clocksource = gpt; + if (clksrc.reserved) + cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); - omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK); - tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt)); + return cyc_to_sched_clock(&cd, cyc, (u32)~0); +} + +/* Setup free-running counter for clocksource */ +static void __init omap2_gp_clocksource_init(int gptimer_id, + const char *fck_source) +{ + int res; + + res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); + BUG_ON(res); - omap_dm_timer_set_load_start(gpt, 1, 0); + pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", + gptimer_id, clksrc.rate); - init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate); + omap_dm_timer_set_load_start(&clksrc, 1, 0); + init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); - if (clocksource_register_hz(&clocksource_gpt, tick_rate)) - printk(err2, clocksource_gpt.name); + if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) + pr_err("Could not register clocksource %s\n", + clocksource_gpt.name); } #endif @@ -320,7 +326,7 @@ static void __init omap2_gp_clocksource_init(void) static void __init omap242x_timer_init(void) { omap2_gp_clockevent_init(1, OMAP2_CLKEV_SOURCE); - omap2_gp_clocksource_init(); + omap2_gp_clocksource_init(2, OMAP2_MPU_SOURCE); } struct sys_timer omap242x_timer = { @@ -330,7 +336,7 @@ struct sys_timer omap242x_timer = { static void __init omap243x_timer_init(void) { omap2_gp_clockevent_init(1, OMAP2_CLKEV_SOURCE); - omap2_gp_clocksource_init(); + omap2_gp_clocksource_init(2, OMAP2_MPU_SOURCE); } struct sys_timer omap243x_timer = { @@ -342,7 +348,7 @@ struct sys_timer omap243x_timer = { static void __init omap3_timer_init(void) { omap2_gp_clockevent_init(1, OMAP3_CLKEV_SOURCE); - omap2_gp_clocksource_init(); + omap2_gp_clocksource_init(2, OMAP3_MPU_SOURCE); } struct sys_timer omap3_timer = { @@ -356,7 +362,7 @@ struct sys_timer omap3_timer = { static void __init omap3_beagle_timer_init(void) { omap2_gp_clockevent_init(OMAP3_BEAGLE_TIMER, OMAP3_CLKEV_SOURCE); - omap2_gp_clocksource_init(); + omap2_gp_clocksource_init(2, OMAP3_MPU_SOURCE); } struct sys_timer omap3_beagle_timer = { @@ -372,7 +378,7 @@ static void __init omap4_timer_init(void) BUG_ON(!twd_base); #endif omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); - omap2_gp_clocksource_init(); + omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); } struct sys_timer omap4_timer = { diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index f7fed60..c13bc3d 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c @@ -126,7 +126,7 @@ static inline unsigned long long notrace _omap_32k_sched_clock(void) return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); } -#ifndef CONFIG_OMAP_MPU_TIMER +#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER) unsigned long long notrace sched_clock(void) { return _omap_32k_sched_clock();