diff mbox

ARM: OMAP4: Fix array size for irq_target_cpu

Message ID 20120905000309.GW1303@atomide.com (mailing list archive)
State New, archived
Headers show

Commit Message

Tony Lindgren Sept. 5, 2012, 12:03 a.m. UTC 
If NR_IRQS is less than MAX_IRQS, we end up writing past the
irq_target_cpu array in omap_wakeupgen_init():

/* Associate all the IRQs to boot CPU like GIC init does. */
for (i = 0; i < max_irqs; i++)
	irq_target_cpu[i] = boot_cpu;

This can happen if SPARSE_IRQ is enabled as by default NR_IRQS is
set to 16. Without this patch we're overwriting other data during
the boot.

Signed-off-by: Tony Lindgren <tony@atomide.com>

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Comments

Santosh Shilimkar Sept. 5, 2012, 4:58 a.m. UTC | #1 
On Wed, Sep 5, 2012 at 5:33 AM, Tony Lindgren <tony@atomide.com> wrote:
>
> If NR_IRQS is less than MAX_IRQS, we end up writing past the
> irq_target_cpu array in omap_wakeupgen_init():
>
> /* Associate all the IRQs to boot CPU like GIC init does. */
> for (i = 0; i < max_irqs; i++)
>         irq_target_cpu[i] = boot_cpu;
>
> This can happen if SPARSE_IRQ is enabled as by default NR_IRQS is
> set to 16. Without this patch we're overwriting other data during
> the boot.
>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
>
Looks good.
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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diff mbox

Patch

--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -47,7 +47,7 @@ 
 static void __iomem *wakeupgen_base;
 static void __iomem *sar_base;
 static DEFINE_SPINLOCK(wakeupgen_lock);
-static unsigned int irq_target_cpu[NR_IRQS];
+static unsigned int irq_target_cpu[MAX_IRQS];
 static unsigned int irq_banks = MAX_NR_REG_BANKS;
 static unsigned int max_irqs = MAX_IRQS;
 static unsigned int omap_secure_apis;