From patchwork Fri Mar 21 05:52:42 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 3871341 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9FB55BF540 for ; Fri, 21 Mar 2014 05:55:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E000120225 for ; Fri, 21 Mar 2014 05:55:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ED605201DE for ; Fri, 21 Mar 2014 05:55:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752549AbaCUFzD (ORCPT ); Fri, 21 Mar 2014 01:55:03 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:48864 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750987AbaCUFzB (ORCPT ); Fri, 21 Mar 2014 01:55:01 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s2L5sUjm025421; Fri, 21 Mar 2014 00:54:30 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2L5sT4G018582; Fri, 21 Mar 2014 00:54:29 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Fri, 21 Mar 2014 00:54:29 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2L5sSSX012518; Fri, 21 Mar 2014 00:54:29 -0500 Date: Fri, 21 Mar 2014 00:52:42 -0500 From: Felipe Balbi To: Lokesh Vutla CC: , , , , , , , , , Dave Gerlach Subject: Re: [PATCH] ARM: dts: am437x-gp-evm: Do not reset gpio5 Message-ID: <20140321055242.GA1959@saruman.home> Reply-To: References: <1395379213-15451-1-git-send-email-lokeshvutla@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1395379213-15451-1-git-send-email-lokeshvutla@ti.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, T_TVD_MIME_EPI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Fri, Mar 21, 2014 at 10:50:13AM +0530, Lokesh Vutla wrote: > From: Dave Gerlach > > Do not reset GPIO5 at boot-up because GPIO5_7 is used > on AM437x GP-EVM to control VTT regulators on DDR3. > Without this some GP-EVM boards will fail to boot because > of DDR3 corruption. > > Reported-by: Nishanth Menon > Tested-by: Nishanth Menon > Signed-off-by: Dave Gerlach > Signed-off-by: Lokesh Vutla every now and again we see a patch like this because yet another board is using a GPIO to toggle DDR regulators. Instead of constantly patching things like this, how about we try something like below (build-tested only): Then, we can even remove ti,no-reset flag from all GPIO DT nodes. diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 1f33f5d..f5962ff 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -2610,6 +2610,10 @@ static int __init _setup_reset(struct omap_hwmod *oh) if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK) return -EPERM; + /* NEVER reset GPIO blocks */ + if (strncmp(oh->name, "gpio", 4) == 0) + return 0; + if (oh->rst_lines_cnt == 0) { r = _enable(oh); if (r) { diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 4243190..ce8b53a 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -1130,6 +1130,29 @@ static void omap_gpio_chip_init(struct gpio_bank *bank) static const struct of_device_id omap_gpio_match[]; +static void omap_gpio_init_context(struct gpio_bank *p) +{ + struct omap_gpio_reg_offs *regs = p->regs; + void __iomem *base = p->base; + + p->context.ctrl = readl_relaxed(base + regs->ctrl); + p->context.oe = readl_relaxed(base + regs->direction); + p->context.wake_en = readl_relaxed(base + regs->wkup_en); + p->context.leveldetect0 = readl_relaxed(base + regs->leveldetect0); + p->context.leveldetect1 = readl_relaxed(base + regs->leveldetect1); + p->context.risingdetect = readl_relaxed(base + regs->risingdetect); + p->context.fallingdetect = readl_relaxed(base + regs->fallingdetect); + p->context.irqenable1 = readl_relaxed(base + regs->irqenable); + p->context.irqenable2 = readl_relaxed(base + regs->irqenable2); + + if (regs->set_dataout && p->regs->clr_dataout) + p->context.dataout = readl_relaxed(base + regs->set_dataout); + else + p->context.dataout = readl_relaxed(base + regs->dataout); + + p->context_valid = true; +} + static int omap_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1246,6 +1269,7 @@ static int omap_gpio_probe(struct platform_device *pdev) omap_gpio_mod_init(bank); omap_gpio_chip_init(bank); omap_gpio_show_rev(bank); + omap_gpio_init_context(bank); pm_runtime_put(bank->dev); @@ -1325,8 +1349,6 @@ update_gpio_context_count: return 0; } -static void omap_gpio_init_context(struct gpio_bank *p); - static int omap_gpio_runtime_resume(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); @@ -1466,29 +1488,6 @@ void omap2_gpio_resume_after_idle(void) } #if defined(CONFIG_PM_RUNTIME) -static void omap_gpio_init_context(struct gpio_bank *p) -{ - struct omap_gpio_reg_offs *regs = p->regs; - void __iomem *base = p->base; - - p->context.ctrl = readl_relaxed(base + regs->ctrl); - p->context.oe = readl_relaxed(base + regs->direction); - p->context.wake_en = readl_relaxed(base + regs->wkup_en); - p->context.leveldetect0 = readl_relaxed(base + regs->leveldetect0); - p->context.leveldetect1 = readl_relaxed(base + regs->leveldetect1); - p->context.risingdetect = readl_relaxed(base + regs->risingdetect); - p->context.fallingdetect = readl_relaxed(base + regs->fallingdetect); - p->context.irqenable1 = readl_relaxed(base + regs->irqenable); - p->context.irqenable2 = readl_relaxed(base + regs->irqenable2); - - if (regs->set_dataout && p->regs->clr_dataout) - p->context.dataout = readl_relaxed(base + regs->set_dataout); - else - p->context.dataout = readl_relaxed(base + regs->dataout); - - p->context_valid = true; -} - static void omap_gpio_restore_context(struct gpio_bank *bank) { writel_relaxed(bank->context.wake_en,