From patchwork Tue Jul 29 16:33:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 4641391 Return-Path: X-Original-To: patchwork-linux-omap@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9EBF0C0338 for ; Tue, 29 Jul 2014 16:35:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 93A9520149 for ; Tue, 29 Jul 2014 16:35:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BA49A20145 for ; Tue, 29 Jul 2014 16:35:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752528AbaG2QfA (ORCPT ); Tue, 29 Jul 2014 12:35:00 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:49300 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751321AbaG2Qe7 (ORCPT ); Tue, 29 Jul 2014 12:34:59 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s6TGY7Ak001375; Tue, 29 Jul 2014 11:34:07 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s6TGY73h002040; Tue, 29 Jul 2014 11:34:07 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Tue, 29 Jul 2014 11:34:06 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s6TGY6dc015387; Tue, 29 Jul 2014 11:34:06 -0500 Date: Tue, 29 Jul 2014 11:33:45 -0500 From: Felipe Balbi To: Felipe Balbi CC: Tony Lindgren , Linux OMAP Mailing List , Linux ARM Kernel Mailing List , , , , , , , Linux Kernel Mailing List Subject: Re: [PATCH 29/35] arm: omap: intc: switch over to linear irq domain Message-ID: <20140729163345.GF17808@saruman.home> Reply-To: References: <1406582183-696-1-git-send-email-balbi@ti.com> <1406582183-696-30-git-send-email-balbi@ti.com> <20140729121425.GR29045@atomide.com> <20140729141522.GB17808@saruman.home> <20140729152052.GV29045@atomide.com> <20140729154057.GE17808@saruman.home> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20140729154057.GE17808@saruman.home> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_TVD_MIME_EPI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi, On Tue, Jul 29, 2014 at 10:40:57AM -0500, Felipe Balbi wrote: > On Tue, Jul 29, 2014 at 08:20:52AM -0700, Tony Lindgren wrote: > > * Felipe Balbi [140729 07:18]: > > > Hi, > > > > > > On Tue, Jul 29, 2014 at 05:14:25AM -0700, Tony Lindgren wrote: > > > > * Felipe Balbi [140728 14:19]: > > > > > now that we don't need to support legacy board-files, > > > > > we can completely switch over to a linear irq domain > > > > > and make use of irq_alloc_domain_generic_chips() to > > > > > allocate all generic irq chips for us. > > > > > > > > This patch seems to somehow break off-idle for omap3 > > > > where it no longer wakes up. > > > > > > Sure your bisection is correct ? This patch just switches from legacy > > > irq domain to linear irq domain. > > > > Yes, I tried it a few times. Just enabling > > retention idle hangs too with this patch. > > > > Maybe it's omap3_prcm_irq_setup that relies on > > 11 + OMAP_INTC_START? There may be other such issues > > lol. > > OMAP4 has the same nonsense. made me think why (if) OMAP4 works with that same setup. Does wake from OFF work with OMAP4 ? Anyway, here's a quick little hack to check if that's the reason for the regression: diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index ff953c9..c234b98 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -97,6 +97,7 @@ prm: prm@48306000 { compatible = "ti,omap3-prm"; reg = <0x48306000 0x4000>; + interrupts = <11>; prm_clocks: clocks { #address-cells = <1>; diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 25e8b82..3d11377 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -242,6 +242,11 @@ void omap_prcm_irq_complete(void) prcm_irq_setup->restore_irqen(prcm_irq_setup->saved_mask); } +static struct of_device_id tmp[] = { + { .compatible = "ti,omap3-prm" }, + { } +}; + /** * omap_prcm_register_chain_handler - initializes the prcm chained interrupt * handler based on provided parameters @@ -254,17 +259,24 @@ void omap_prcm_irq_complete(void) */ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) { + struct device_node *node; int nr_regs; u32 mask[OMAP_PRCM_MAX_NR_PENDING_REG]; int offset, i; + int irq; struct irq_chip_generic *gc; struct irq_chip_type *ct; if (!irq_setup) return -EINVAL; + irq = irq_setup->irq; nr_regs = irq_setup->nr_regs; + node = of_find_matching_node(NULL, tmp); + if (node) + irq = of_irq_get(node, 0); + if (prcm_irq_setup) { pr_err("PRCM: already initialized; won't reinitialize\n"); return -EINVAL; @@ -298,7 +310,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup) 1 << (offset & 0x1f); } - irq_set_chained_handler(irq_setup->irq, omap_prcm_irq_handler); + irq_set_chained_handler(irq, omap_prcm_irq_handler); irq_setup->base_irq = irq_alloc_descs(-1, 0, irq_setup->nr_regs * 32, 0);