From patchwork Fri Oct 21 10:38:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 9388663 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BBBC1607D0 for ; Fri, 21 Oct 2016 10:40:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ACF6929FF3 for ; Fri, 21 Oct 2016 10:40:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A166129FF5; Fri, 21 Oct 2016 10:40:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E09A129FF3 for ; Fri, 21 Oct 2016 10:40:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754332AbcJUKkT (ORCPT ); Fri, 21 Oct 2016 06:40:19 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:35704 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755185AbcJUKkR (ORCPT ); Fri, 21 Oct 2016 06:40:17 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id u9LAdlMF011497; Fri, 21 Oct 2016 05:39:47 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u9LAdlTx006709; Fri, 21 Oct 2016 05:39:47 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Fri, 21 Oct 2016 05:39:46 -0500 Received: from a0131933.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id u9LAdL5g009291; Fri, 21 Oct 2016 05:39:44 -0500 From: Lokesh Vutla To: Tony Lindgren , Linux OMAP Mailing List CC: Tero Kristo , Sekhar Nori , Nishanth Menon , Device Tree Mailing List , Rob Herring , Linux ARM Mailing List , Lokesh Vutla , Keerthy Subject: [PATCH v2 7/9] ARM: dts: Add support for dra718-evm Date: Fri, 21 Oct 2016 16:08:39 +0530 Message-ID: <20161021103841.8044-8-lokeshvutla@ti.com> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20161021103841.8044-1-lokeshvutla@ti.com> References: <20161021103841.8044-1-lokeshvutla@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Nishanth Menon The DRA718-evm is a board based on TI's DRA718 processor targeting BOM-optimized entry infotainment systems and is a reduced pin and software compatible derivative of the DRA72 ES2.0 processor. This platform features: - 2GB of DDR3L - Dual 1Gbps Ethernet - HDMI, - uSD - 8GB eMMC - CAN - PCIe - USB3.0 - Video Input Port - LP873x PMIC More information can be found here[1]. Adding support for this board while reusing the data available in dra72-evm-common.dtsi. [1] http://www.ti.com/product/dra718 Signed-off-by: Nishanth Menon Signed-off-by: Keerthy Signed-off-by: Lokesh Vutla --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/dra71-evm.dts | 230 ++++++++++++++++++++++++++++++++ arch/arm/boot/dts/dra72-evm-common.dtsi | 6 +- 3 files changed, 236 insertions(+), 3 deletions(-) create mode 100644 arch/arm/boot/dts/dra71-evm.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index befcd26..b92d501 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -590,7 +590,8 @@ dtb-$(CONFIG_SOC_DRA7XX) += \ am572x-idk.dtb \ dra7-evm.dtb \ dra72-evm.dtb \ - dra72-evm-revc.dtb + dra72-evm-revc.dtb \ + dra71-evm.dtb dtb-$(CONFIG_ARCH_ORION5X) += \ orion5x-kuroboxpro.dtb \ orion5x-lacie-d2-network.dtb \ diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts new file mode 100644 index 0000000..2b9a5a8 --- /dev/null +++ b/arch/arm/boot/dts/dra71-evm.dts @@ -0,0 +1,230 @@ +/* + * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "dra72-evm-common.dtsi" +#include + +/ { + compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7"; + model = "TI DRA718 EVM"; + + memory { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */ + }; + + vpo_sd_1v8_3v3: gpio-regulator-TPS74801 { + compatible = "regulator-gpio"; + + regulator-name = "vddshv8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + vin-supply = <&evm_5v0>; + + gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; + states = <1800000 0x0 + 3000000 0x1>; + }; + + poweroff: gpio-poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>; + input; + }; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + + lp8733: lp8733@60 { + compatible = "ti,lp8733"; + reg = <0x60>; + + buck0-in-supply =<&vsys_3v3>; + buck1-in-supply =<&vsys_3v3>; + ldo0-in-supply =<&evm_5v0>; + ldo1-in-supply =<&evm_5v0>; + + lp8733_regulators: regulators { + lp8733_buck0_reg: buck0 { + /* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */ + regulator-name = "lp8733-buck0"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + }; + + lp8733_buck1_reg: buck1 { + /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */ + regulator-name = "lp8733-buck1"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-boot-on; + regulator-always-on; + }; + + lp8733_ldo0_reg: ldo0 { + /* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */ + regulator-name = "lp8733-ldo0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + lp8733_ldo1_reg: ldo1 { + /* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */ + regulator-name = "lp8733-ldo1"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + + lp8732: lp8732@61 { + compatible = "ti,lp8732"; + reg = <0x61>; + + buck0-in-supply =<&vsys_3v3>; + buck1-in-supply =<&vsys_3v3>; + ldo0-in-supply =<&vsys_3v3>; + ldo1-in-supply =<&vsys_3v3>; + + lp8732_regulators: regulators { + lp8732_buck0_reg: buck0 { + /* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */ + regulator-name = "lp8732-buck0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + lp8732_buck1_reg: buck1 { + /* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */ + regulator-name = "lp8732-buck1"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-boot-on; + regulator-always-on; + }; + + lp8732_ldo0_reg: ldo0 { + /* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */ + regulator-name = "lp8732-ldo0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + lp8732_ldo1_reg: ldo1 { + /* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */ + regulator-name = "lp8732-ldo1"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; +}; + +&pcf_gpio_21 { + interrupt-parent = <&gpio7>; + interrupts = <31 IRQ_TYPE_EDGE_FALLING>; +}; + +&pcf_hdmi { + p0 { + /* + * PM_OEn to High: Disable routing I2C3 to PM_I2C + * With this PM_SEL(p3) should not matter + */ + gpio-hog; + gpios = <0 GPIO_ACTIVE_LOW>; + output-high; + line-name = "pm_oe_n"; + }; +}; + +&mmc1 { + vmmc_aux-supply = <&vpo_sd_1v8_3v3>; +}; + +&mac { + mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>, + <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */ + <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */ + dual_emac; +}; + +&cpsw_emac0 { + phy_id = <&davinci_mdio>, <2>; + phy-mode = "rgmii-id"; + dual_emac_res_vlan = <1>; +}; + +&cpsw_emac1 { + phy_id = <&davinci_mdio>, <3>; + phy-mode = "rgmii-id"; + dual_emac_res_vlan = <2>; +}; + +&davinci_mdio { + dp83867_0: ethernet-phy@2 { + reg = <2>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,impedance-control = <0x1f>; + }; + + dp83867_1: ethernet-phy@3 { + reg = <3>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,impedance-control = <0x1f>; + }; +}; + +/* No Sata on this device */ +&sata_phy { + status = "disabled"; +}; + +&sata { + status = "disabled"; +}; + +/* No RTC on this device */ +&rtc { + status = "disabled"; +}; + +&usb2_phy1 { + phy-supply = <&lp8733_ldo1_reg>; +}; + +&usb2_phy2 { + phy-supply = <&lp8733_ldo1_reg>; +}; + +&dss { + /* Supplied by VDA_1V8_PLL */ + vdda_video-supply = <&lp8732_ldo0_reg>; +}; + +&hdmi { + /* Supplied by VDA_1V8_PHY */ + vdda_video-supply = <&lp8732_ldo1_reg>; +}; diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index 9903ac7..e50fbee 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -29,7 +29,8 @@ }; evm_5v0: fixedregulator-evm5v0 { - /* Output 1 of TPS43351QDAPRQ1 */ + /* Output 1 of TPS43351QDAPRQ1 on dra72-evm */ + /* Output 1 of LM5140QRWGTQ1 on dra71-evm */ compatible = "regulator-fixed"; regulator-name = "evm_5v0"; regulator-min-microvolt = <5000000>; @@ -40,7 +41,8 @@ }; vsys_3v3: fixedregulator-vsys3v3 { - /* Output 2 of TPS43351QDAPRQ1 */ + /* Output 2 of TPS43351QDAPRQ1 on dra72-evm */ + /* Output 2 of LM5140QRWGTQ1 on dra71-evm */ compatible = "regulator-fixed"; regulator-name = "vsys_3v3"; regulator-min-microvolt = <3300000>;