From patchwork Thu Jan 19 17:31:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 9526557 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AD8EC60459 for ; Thu, 19 Jan 2017 17:42:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9D6792656B for ; Thu, 19 Jan 2017 17:42:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 904D7284D8; Thu, 19 Jan 2017 17:42:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B49AD2656B for ; Thu, 19 Jan 2017 17:42:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753606AbdASRmT (ORCPT ); Thu, 19 Jan 2017 12:42:19 -0500 Received: from mail-wm0-f54.google.com ([74.125.82.54]:37412 "EHLO mail-wm0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751534AbdASRlY (ORCPT ); Thu, 19 Jan 2017 12:41:24 -0500 Received: by mail-wm0-f54.google.com with SMTP id c206so4501244wme.0 for ; Thu, 19 Jan 2017 09:41:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=sXeR3JgQO5AtPzu/tZHxRhs41cl1rN1CTrTVKdoo5fA=; b=p7Aw2gE2BBomAaDSgfsEdt27uTcqeFZ+iS4YEJaPzfEw68YeVSZoGx4O3+m1rAPwx+ X9RHntk3tjfj2mPzna+xMnMBiqvO7k2dsBj6XiuyjYSQ5VHnk46Vo62GHlJbMUZukLdd 8Tco268Deiwf38sFKZNNk0/V+D7DOF9br958Vdq/xN2Yr6xq3iDVOMSAaUHPotZ7gWzG v5f5q9p/u5l5aOH6BgcNrcbx4ALqj6JoM6792oZLt2GVKCHevozPwwr5nMn8UO9uwLFb ryznK69QaDIe+UombTdlDk7MUQBO5Hml4VL2mshvNg/5ep/ZULCvqn/OnQOFX/VdHt6y yP0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=sXeR3JgQO5AtPzu/tZHxRhs41cl1rN1CTrTVKdoo5fA=; b=GHBJPCk5DuTD5oxWcF2EctZxPs/Sej5ScSkNIKcT+ELwzVLo7CytfY+jQWBQfU9Ka9 qxWoOIafRmvHx29rZhrHULr9EeMPRlxJi8i6KcDjxMMqJTLG+7WAzM49EoXHKCHNBFZI cebzx6QGp0q8VI74gp15H1nsuussE5p6sivBgOxREKNCvKLjPqmqNZXP9OIRpbMepGSb yEnOUWYUP0tSJqDfMbufL6JN+6oN/A9y/3IBO41CCXZ1Mb43Myk4Nqo8LV6Qo0fc3wVi 2cC0aeje2XIXII49mAhBWsQgct9oWf88V119pATJ3YRrRJ+QVKafUfwsUj2CBB0y2Mxq U/Cw== X-Gm-Message-State: AIkVDXKouBLUpZ73QBPGewY4z8a05B3TvPmmu0RRRRzDqo/2RwNFiQy0g2+9Zcdl4wVkA4Fn X-Received: by 10.28.134.146 with SMTP id i140mr26906204wmd.100.1484847126004; Thu, 19 Jan 2017 09:32:06 -0800 (PST) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id t194sm7006985wmd.1.2017.01.19.09.32.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 19 Jan 2017 09:32:05 -0800 (PST) From: Alexandre Bailon To: grygorii.strashko@ti.com Cc: nsekhar@ti.com, khilman@baylibre.com, ptitiano@baylibre.com, tony@atomide.com, linux-omap@vger.kernel.org, b-liu@ti.com, sergei.shtylyov@cogentembedded.com, linux-usb@vger.kernel.org, Alexandre Bailon Subject: Re: [PATCH] arm: davinci: Make the usb20 clock available to PM runtime Date: Thu, 19 Jan 2017 18:31:55 +0100 Message-Id: <20170119173155.5599-1-abailon@baylibre.com> X-Mailer: git-send-email 2.10.2 In-Reply-To: References: In-Reply-To: References: Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 01/19/2017 05:49 PM, Grygorii Strashko wrote: > On 01/19/2017 09:08 AM, Alexandre Bailon wrote: >> On 01/19/2017 03:48 PM, Sekhar Nori wrote: >>> On Thursday 19 January 2017 07:39 PM, Alexandre Bailon wrote: >>>> Add usb20 to the list of clock supported by PM runtime. >>>> >>>> Signed-off-by: Alexandre Bailon >>>> --- >>>> arch/arm/mach-davinci/pm_domain.c | 2 +- >>>> 1 file changed, 1 insertion(+), 1 deletion(-) >>>> >>>> diff --git a/arch/arm/mach-davinci/pm_domain.c b/arch/arm/mach-davinci/pm_domain.c >>>> index 78eac2c..66471f2 100644 >>>> --- a/arch/arm/mach-davinci/pm_domain.c >>>> +++ b/arch/arm/mach-davinci/pm_domain.c >>>> @@ -23,7 +23,7 @@ static struct dev_pm_domain davinci_pm_domain = { >>>> >>>> static struct pm_clk_notifier_block platform_bus_notifier = { >>>> .pm_domain = &davinci_pm_domain, >>>> - .con_ids = { "fck", "master", "slave", NULL }, >>>> + .con_ids = { "fck", "master", "slave", "usb20", NULL }, >>> >>> Instead of doing this, can we drop the con_id from musb clock? Looking >>> at the USB clocking diagram in the TRM. There is a single clock input to >>> the USB 2.0 subsystem. There is no real need for a con_id at all. >> Currently, the con_id is required to get the usb20 clock from usb-da8xx.c >> I will try to figure out which changes are required remove con_id. > > It most probably should be renamed to "fck" then it should work with your > patch "[PATCH v3 5/5] usb: musb: da8xx: Add a primary support of PM runtime". Actually, because of the USB phy, more changes are required. Something like that works for me. --- arch/arm/mach-davinci/da850.c | 8 -------- arch/arm/mach-davinci/usb-da8xx.c | 36 ++++++++++++++++++++++-------------- 2 files changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 1d873d1..c143591 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -394,13 +394,6 @@ static struct clk usb11_clk = { .gpsc = 1, }; -static struct clk usb20_clk = { - .name = "usb20", - .parent = &pll0_sysclk2, - .lpsc = DA8XX_LPSC1_USB20, - .gpsc = 1, -}; - static struct clk spi0_clk = { .name = "spi0", .parent = &pll0_sysclk2, @@ -567,7 +560,6 @@ static struct clk_lookup da850_clks[] = { */ CLK(NULL, "aemif", &aemif_nand_clk), CLK("ohci-da8xx", "usb11", &usb11_clk), - CLK("musb-da8xx", "usb20", &usb20_clk), CLK("spi_davinci.0", NULL, &spi0_clk), CLK("spi_davinci.1", NULL, &spi1_clk), CLK("vpif", NULL, &vpif_clk), diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c index 9a6af0b..421b4a1 100644 --- a/arch/arm/mach-davinci/usb-da8xx.c +++ b/arch/arm/mach-davinci/usb-da8xx.c @@ -16,13 +16,19 @@ #include #include #include +#include "psc.h" #include "clock.h" #define DA8XX_USB0_BASE 0x01e00000 #define DA8XX_USB1_BASE 0x01e25000 -static struct clk *usb20_clk; +static struct clk usb20_clk = { + .name = "usb20", + .parent = NULL, + .lpsc = DA8XX_LPSC1_USB20, + .gpsc = 1, +}; static struct platform_device da8xx_usb_phy = { .name = "da8xx-usb-phy", @@ -166,7 +172,7 @@ static void usb20_phy_clk_enable(struct clk *clk) val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); /* The USB 2.O PLL requires that the USB 2.O PSC is enabled as well. */ - davinci_clk_enable(usb20_clk); + davinci_clk_enable(&usb20_clk); /* * Turn on the USB 2.0 PHY, but just the PLL, and not OTG. The USB 1.1 @@ -186,7 +192,7 @@ static void usb20_phy_clk_enable(struct clk *clk) pr_err("Timeout waiting for USB 2.0 PHY clock good\n"); done: - davinci_clk_disable(usb20_clk); + davinci_clk_disable(&usb20_clk); } static void usb20_phy_clk_disable(struct clk *clk) @@ -261,8 +267,10 @@ static struct clk usb20_phy_clk = { .set_parent = usb20_phy_clk_set_parent, }; -static struct clk_lookup usb20_phy_clk_lookup = - CLK("da8xx-usb-phy", "usb20_phy", &usb20_phy_clk); +static struct clk_lookup usb20_clks[] = { + CLK("da8xx-usb-phy", "usb20_phy", &usb20_phy_clk), + CLK("musb-da8xx", NULL, &usb20_clk), +}; /** * da8xx_register_usb20_phy_clk - register USB0PHYCLKMUX clock @@ -275,25 +283,25 @@ int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin) struct clk *parent; int ret; - usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20"); - ret = PTR_ERR_OR_ZERO(usb20_clk); + + parent = clk_get(NULL, "pll0_sysclk2"); + ret = PTR_ERR_OR_ZERO(parent); if (ret) return ret; + usb20_clk.parent = parent; + clk_put(parent); + parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "pll0_aux"); ret = PTR_ERR_OR_ZERO(parent); - if (ret) { - clk_put(usb20_clk); + if (ret) return ret; - } usb20_phy_clk.parent = parent; - ret = clk_register(&usb20_phy_clk); - if (!ret) - clkdev_add(&usb20_phy_clk_lookup); - clk_put(parent); + davinci_clk_init(usb20_clks); + return ret; }