diff mbox

[1/4] ARM: dts: omap3-igep: OneNAND support

Message ID 20170211130116.7ua7hfkw465tspli@lenoch (mailing list archive)
State New, archived
Headers show

Commit Message

Ladislav Michl Feb. 11, 2017, 1:01 p.m. UTC
Add OneNAND node for IGEP and leave it disabled by default. It is up
to bootloader to enable proper node. Timing just works, but values are
copied over from N900 as I was unable to find chip datasheet.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
---
 arch/arm/boot/dts/omap3-igep.dtsi | 52 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

Comments

Tony Lindgren Feb. 28, 2017, 5:11 p.m. UTC | #1
* Ladislav Michl <ladis@linux-mips.org> [170211 05:02]:
> Add OneNAND node for IGEP and leave it disabled by default. It is up
> to bootloader to enable proper node. Timing just works, but values are
> copied over from N900 as I was unable to find chip datasheet.

FYI, I'll apply this into omap-for-v4.11/dt when I set it up after
v4.11-rc1.

Then I've applied these two into omap-for-v4.11/fixes:

ARM: OMAP2+: Remove legacy gpmc-nand.c
ARM: OMAP2+: gpmc-onenand: propagate error on initialization failure

The rest I got lost with in the thread, so please repost the
missing parts as needed :)

Regards,

Tony
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index e268efde6c6d..f75cbf297798 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -37,6 +37,13 @@ 
 };
 
 &omap3_pmx_core {
+	gpmc_pins: pinmux_gpmc_pins {
+		pinctrl-single,pins = <
+			/* OneNAND seems to require PIN_INPUT on clock. */
+                        OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
+		>;
+	};
+
 	uart1_pins: pinmux_uart1_pins {
 		pinctrl-single,pins = <
 			OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)	/* uart1_rx.uart1_rx */
@@ -98,6 +105,9 @@ 
 };
 
 &gpmc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&gpmc_pins>;
+
 	nand@0,0 {
 		compatible = "ti,omap2-nand";
 		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
@@ -124,8 +134,50 @@ 
 		gpmc,wr-access-ns = <40>;
 		gpmc,wr-data-mux-bus-ns = <0>;
 
+ 		#address-cells = <1>;
+ 		#size-cells = <1>;
+
+		status = "okay";
+	};
+
+	onenand@0,0 {
+		compatible = "ti,omap2-onenand";
+		reg = <0 0 0x20000>;	/* CS0, offset 0, IO size 128K */
+
+		gpmc,sync-read;
+		gpmc,sync-write;
+		gpmc,burst-length = <16>;
+		gpmc,burst-read;
+		gpmc,burst-wrap;
+		gpmc,burst-write;
+		gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
+		gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
+		gpmc,cs-on-ns = <0>;
+		gpmc,cs-rd-off-ns = <87>;
+		gpmc,cs-wr-off-ns = <87>;
+		gpmc,adv-on-ns = <0>;
+		gpmc,adv-rd-off-ns = <10>;
+		gpmc,adv-wr-off-ns = <10>;
+		gpmc,oe-on-ns = <15>;
+		gpmc,oe-off-ns = <87>;
+		gpmc,we-on-ns = <0>;
+		gpmc,we-off-ns = <87>;
+		gpmc,rd-cycle-ns = <112>;
+		gpmc,wr-cycle-ns = <112>;
+		gpmc,access-ns = <81>;
+		gpmc,page-burst-access-ns = <15>;
+		gpmc,bus-turnaround-ns = <0>;
+		gpmc,cycle2cycle-delay-ns = <0>;
+		gpmc,wait-monitoring-ns = <0>;
+		gpmc,clk-activation-ns = <5>;
+		gpmc,wr-data-mux-bus-ns = <30>;
+		gpmc,wr-access-ns = <81>;
+		gpmc,sync-clk-ps = <15000>;
+
 		#address-cells = <1>;
 		#size-cells = <1>;
+
+		status = "disabled";
 	};
 };