From patchwork Wed Feb 15 13:56:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 9574129 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EAADF601D8 for ; Wed, 15 Feb 2017 13:57:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E301B28451 for ; Wed, 15 Feb 2017 13:57:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D68A628454; Wed, 15 Feb 2017 13:57:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7F7AE28498 for ; Wed, 15 Feb 2017 13:57:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751410AbdBON4x (ORCPT ); Wed, 15 Feb 2017 08:56:53 -0500 Received: from mail-wm0-f44.google.com ([74.125.82.44]:38085 "EHLO mail-wm0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750838AbdBON4u (ORCPT ); Wed, 15 Feb 2017 08:56:50 -0500 Received: by mail-wm0-f44.google.com with SMTP id r141so41210709wmg.1 for ; Wed, 15 Feb 2017 05:56:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7wgGwHHCbK4QIdYh+s5dedPVMyY/IJ6OMFgiuMctoT8=; b=MbkaVoXYZbzq1wGWUffNipgaZzPMxxXKWkBlM7io7hcPMjJST6EaSEjL3cQHZC5nW7 nGuXFWW+t5Qb7UqlwziUlVJV5C/euJQiVfn3ix78zQ6RcWB9yHDQVZLQHRO0lrC5AK+d Z6iOarDFmKHesSgP0M3WsZbILFdy/Ie6lnmflv3F2CX3aSwV4CDVjDKybSDIlIe4HS9K RTI8ji7eCP7YRSfQUqx14Rae7pPKgSM3Tx9gafJjYPgX0zzQ8B0UWR9LlITrrL69Hj+L Bt+Z3qLqwOwyQni3nVFCbtAJ1q9bjEwXvBsOMhInfs565qj/paoSSsjyMqDkzQUZHJKL f73Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7wgGwHHCbK4QIdYh+s5dedPVMyY/IJ6OMFgiuMctoT8=; b=JIKeS+3NV+14h9Rgo5sDVP0I7a0cWUP3KI+KPm76Py8Lz9echXaut33FSKp478IZ5u 6Wrlm83Xi5hvoUtxlqNfS8QtGaImdInD9NhThbSLShYhKkYHhtYGWtIHrDL83Nae+P/B /RP5SqadPqV8BCbu9W/hIjRGnmMND16/Fo7Zn6DQD0gv9PDhizzCoK8JpLTT8jC/FJbi 2F8nnf3XSucHbBvH+QrJcUK+rJQHHGE8t/V+z0HdgleSy7txA3lw87kVidTA05cjSxiB Fs42FXbfvCNC1ff0H9emcTr7+v+vCw+uO4mqJDozDP0hXpnOS6M/vOw84hCJNRBxVodS K0cw== X-Gm-Message-State: AMke39kfD+MkCktXxkUAkw+PJZ2mRQegl3cjwZVnsDdLrrxAGvx+50DkgkvQd+owbx6294Og X-Received: by 10.28.9.148 with SMTP id 142mr7783297wmj.42.1487167003720; Wed, 15 Feb 2017 05:56:43 -0800 (PST) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id a35sm5023174wra.21.2017.02.15.05.56.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 15 Feb 2017 05:56:43 -0800 (PST) From: Alexandre Bailon To: vinod.koul@intel.com Cc: dmaengine@vger.kernel.org, nsekhar@ti.com, khilman@baylibre.com, ptitiano@baylibre.com, tony@atomide.com, linux-omap@vger.kernel.org, b-liu@ti.com, sergei.shtylyov@cogentembedded.com, linux-usb@vger.kernel.org, Alexandre Bailon Subject: [PATCH v5 3/5] dmaengine: cppi41: Move some constants to glue layer Date: Wed, 15 Feb 2017 14:56:34 +0100 Message-Id: <20170215135636.31427-4-abailon@baylibre.com> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170215135636.31427-1-abailon@baylibre.com> References: <20170215135636.31427-1-abailon@baylibre.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some constants are defined and use by the driver whereas they are specifics to AM335x. Add new variables to the glue layer, initialize them with the constants, and use them in the driver. Signed-off-by: Alexandre Bailon --- drivers/dma/cppi41.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/dma/cppi41.c b/drivers/dma/cppi41.c index d1b5569..676228f 100644 --- a/drivers/dma/cppi41.c +++ b/drivers/dma/cppi41.c @@ -68,7 +68,6 @@ #define QMGR_MEMCTRL_IDX_SH 16 #define QMGR_MEMCTRL_DESC_SH 8 -#define QMGR_NUM_PEND 5 #define QMGR_PEND(x) (0x90 + (x) * 4) #define QMGR_PENDING_SLOT_Q(x) (x / 32) @@ -138,6 +137,8 @@ struct cppi41_dd { const struct chan_queues *queues_rx; const struct chan_queues *queues_tx; struct chan_queues td_queue; + u16 first_completion_queue; + u16 qmgr_num_pend; struct list_head pending; /* Pending queued transfers */ spinlock_t lock; /* Lock for pending list */ @@ -148,7 +149,6 @@ struct cppi41_dd { bool is_suspended; }; -#define FIST_COMPLETION_QUEUE 93 static struct chan_queues am335x_usb_queues_tx[] = { /* USB0 ENDP 1 */ [ 0] = { .submit = 32, .complete = 93}, @@ -226,6 +226,8 @@ struct cppi_glue_infos { const struct chan_queues *queues_rx; const struct chan_queues *queues_tx; struct chan_queues td_queue; + u16 first_completion_queue; + u16 qmgr_num_pend; }; static struct cppi41_channel *to_cpp41_chan(struct dma_chan *c) @@ -284,19 +286,21 @@ static u32 cppi41_pop_desc(struct cppi41_dd *cdd, unsigned queue_num) static irqreturn_t cppi41_irq(int irq, void *data) { struct cppi41_dd *cdd = data; + u16 first_completion_queue = cdd->first_completion_queue; + u16 qmgr_num_pend = cdd->qmgr_num_pend; struct cppi41_channel *c; int i; - for (i = QMGR_PENDING_SLOT_Q(FIST_COMPLETION_QUEUE); i < QMGR_NUM_PEND; + for (i = QMGR_PENDING_SLOT_Q(first_completion_queue); i < qmgr_num_pend; i++) { u32 val; u32 q_num; val = cppi_readl(cdd->qmgr_mem + QMGR_PEND(i)); - if (i == QMGR_PENDING_SLOT_Q(FIST_COMPLETION_QUEUE) && val) { + if (i == QMGR_PENDING_SLOT_Q(first_completion_queue) && val) { u32 mask; /* set corresponding bit for completetion Q 93 */ - mask = 1 << QMGR_PENDING_BIT_Q(FIST_COMPLETION_QUEUE); + mask = 1 << QMGR_PENDING_BIT_Q(first_completion_queue); /* not set all bits for queues less than Q 93 */ mask--; /* now invert and keep only Q 93+ set */ @@ -884,7 +888,7 @@ static int init_cppi41(struct device *dev, struct cppi41_dd *cdd) return -ENOMEM; cppi_writel(cdd->scratch_phys, cdd->qmgr_mem + QMGR_LRAM0_BASE); - cppi_writel(QMGR_SCRATCH_SIZE, cdd->qmgr_mem + QMGR_LRAM_SIZE); + cppi_writel(TOTAL_DESCS_NUM, cdd->qmgr_mem + QMGR_LRAM_SIZE); cppi_writel(0, cdd->qmgr_mem + QMGR_LRAM1_BASE); ret = init_descs(dev, cdd); @@ -967,6 +971,8 @@ static const struct cppi_glue_infos am335x_usb_infos = { .queues_rx = am335x_usb_queues_rx, .queues_tx = am335x_usb_queues_tx, .td_queue = { .submit = 31, .complete = 0 }, + .first_completion_queue = 93, + .qmgr_num_pend = 5, }; static const struct of_device_id cppi41_dma_ids[] = { @@ -1049,6 +1055,8 @@ static int cppi41_dma_probe(struct platform_device *pdev) cdd->queues_rx = glue_info->queues_rx; cdd->queues_tx = glue_info->queues_tx; cdd->td_queue = glue_info->td_queue; + cdd->qmgr_num_pend = glue_info->qmgr_num_pend; + cdd->first_completion_queue = glue_info->first_completion_queue; ret = init_cppi41(dev, cdd); if (ret)