From patchwork Tue Apr 25 18:33:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 9699273 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EAB79601D3 for ; Tue, 25 Apr 2017 18:34:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D74122846C for ; Tue, 25 Apr 2017 18:34:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CB1ED2857D; Tue, 25 Apr 2017 18:34:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 85C252846C for ; Tue, 25 Apr 2017 18:34:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1953372AbdDYSds (ORCPT ); Tue, 25 Apr 2017 14:33:48 -0400 Received: from mail-qt0-f193.google.com ([209.85.216.193]:35028 "EHLO mail-qt0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1948903AbdDYSdZ (ORCPT ); Tue, 25 Apr 2017 14:33:25 -0400 Received: by mail-qt0-f193.google.com with SMTP id o36so26387861qtb.2; Tue, 25 Apr 2017 11:33:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=9D0CggdTG/mWq4oGE/qNLoFBP/RLNhsY+YgzJsaC+CI=; b=Y3gGTJyh0u2OefqG9KBY0djoOtNepTs+Kw9Y6QeIEqLyLWwIat8UWSvEIJTb8/xmRk pBbyb9mJFOL/MJjlzU21hxtCvGVtNVlIMsT3kaG3RDbIfP1/FSv1xYkgmggoHFffU4QO JFBMJgxdYcB0pk1MMK2sTnjDwDPVAEpjNcFDDnfBuZeWS9xFHAuuHybe0weJw8uSvD+n YjH1iDH8WT8mJBcpuke/lyUAyuOf8Tml9KWsBOluqcGTpLLRGyAvw8+SybaB/c3BXtmG pSchyEBlVhPAJfEoxG2HXri46JsFdThDllz59sAgVOkd/W7IE45aj8ocB/J5ST4uV7am yqNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=9D0CggdTG/mWq4oGE/qNLoFBP/RLNhsY+YgzJsaC+CI=; b=CtBtEcgJ5xvbdlokrlMogFGPYH61uPA8gwjtRCiz0iSxNTVbGZQEmKLchCaPfAFNzY yPFTGyLq0432/1j9GG+CiWS3YSe3sIqqJy72siGTomqbFw6y0NkRDsRwPF6jnxJoZFQg 1z44jq4okNY7YMeoHSHp0LW0iiHw0wYQ0pJDuuH/bOEaL44eVAlrSrPoXQy2r0HKKdI2 n1dbPZubOQqDAkwVt3mNYWPQFSjM6J2zMaxk9tq1VzHotwWRWpPle9XgUSGM4iRbqDOw PpLK/INT2eiEDLNdKvd/p+Eey/2mVVne0Va1zQMKuiCV8D2OdfckXy0VG2k5ReyBQCK/ IccQ== X-Gm-Message-State: AN3rC/63yDkFgBRFRBLDW/qpTzLHORj0eIiOqh9J+mI1oxSwOSUafIRV lSe+TQ8CCWVlEQ== X-Received: by 10.200.3.137 with SMTP id t9mr35380050qtg.244.1493145193231; Tue, 25 Apr 2017 11:33:13 -0700 (PDT) Received: from fainelli-desktop.irv.broadcom.com ([192.19.255.250]) by smtp.gmail.com with ESMTPSA id a8sm8962210qkc.10.2017.04.25.11.33.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 25 Apr 2017 11:33:12 -0700 (PDT) From: Florian Fainelli To: netdev@vger.kernel.org Cc: rogerq@ti.com, andrew@lunn.ch, davem@davemloft.net, tony@atomide.com, nsekhar@ti.com, jsarha@ti.com, linux-omap@vger.kernel.org, lars@metafoo.de, Florian Fainelli , Rob Herring , Mark Rutland , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH net-next] dt-bindings: mdio: Clarify binding document Date: Tue, 25 Apr 2017 11:33:03 -0700 Message-Id: <20170425183308.26107-1-f.fainelli@gmail.com> X-Mailer: git-send-email 2.9.3 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The described GPIO reset property is applicable to *all* child PHYs. If we have one reset line per PHY present on the MDIO bus, these automatically become properties of the child PHY nodes. Finally, indicate how the RESET pulse width must be defined, which is the maximum value of all individual PHYs RESET pulse widths determined by reading their datasheets. Fixes: 69226896ad63 ("mdio_bus: Issue GPIO RESET to PHYs.") Signed-off-by: Florian Fainelli Reviewed-by: Roger Quadros --- Documentation/devicetree/bindings/net/mdio.txt | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/net/mdio.txt b/Documentation/devicetree/bindings/net/mdio.txt index 4ffbbacebda1..96a53f89aa6e 100644 --- a/Documentation/devicetree/bindings/net/mdio.txt +++ b/Documentation/devicetree/bindings/net/mdio.txt @@ -3,13 +3,17 @@ Common MDIO bus properties. These are generic properties that can apply to any MDIO bus. Optional properties: -- reset-gpios: List of one or more GPIOs that control the RESET lines - of the PHYs on that MDIO bus. -- reset-delay-us: RESET pulse width in microseconds as per PHY datasheet. +- reset-gpios: One GPIO that control the RESET lines of all PHYs on that MDIO + bus. +- reset-delay-us: RESET pulse width in microseconds. A list of child nodes, one per device on the bus is expected. These should follow the generic phy.txt, or a device specific binding document. +The 'reset-delay-us' indicates the RESET signal pulse width in microseconds and +applies to all PHY devices. It must therefore be appropriately determined based +on all PHY requirements (maximum value of all per-PHY RESET pulse widths). + Example : This example shows these optional properties, plus other properties required for the TI Davinci MDIO driver. @@ -21,7 +25,7 @@ required for the TI Davinci MDIO driver. #size-cells = <0>; reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; - reset-delay-us = <2>; /* PHY datasheet states 1us min */ + reset-delay-us = <2>; ethphy0: ethernet-phy@1 { reg = <1>;