From patchwork Tue Jul 18 19:54:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 9849385 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5CCE3602A7 for ; Tue, 18 Jul 2017 19:55:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3E3C81FFCA for ; Tue, 18 Jul 2017 19:55:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2FFEC1FFF9; Tue, 18 Jul 2017 19:55:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 980AF1FFCA for ; Tue, 18 Jul 2017 19:55:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751693AbdGRTzJ (ORCPT ); Tue, 18 Jul 2017 15:55:09 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:19681 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751485AbdGRTzJ (ORCPT ); Tue, 18 Jul 2017 15:55:09 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v6IJt5Es001376; Tue, 18 Jul 2017 14:55:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1500407706; bh=jPe+wm/exE9YdLU3sgKl961t/wMEolrq7J3PpPqzKgs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LR1i/tbmI1sug/lFfaMIwQBqMehdFPA6tMYYwSWpBJ7W4geDnuQueDf//ZjPZxiFQ lLJwBgt1Ytw9h3tdLf3YB6exdijX1W7BYBIrBafkx6rgk7TEsqvjhUc/2A+IXxlVsn 5zLdJYJlqzYggddqYgEdhHSMnZC5OoNPSoUiao7s= Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v6IJt5GP014485; Tue, 18 Jul 2017 14:55:05 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Tue, 18 Jul 2017 14:55:05 -0500 Received: from a0131933vb.am.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v6IJt5YE004344; Tue, 18 Jul 2017 14:55:05 -0500 From: Lokesh Vutla To: Tony Lindgren , Linux OMAP Mailing List CC: Tero Kristo , Sekhar Nori , Device Tree Mailing List , Rob Herring , Vignesh R , Keerthy , Praneeth Bajjuri , Lokesh Vutla Subject: [PATCH 2/8] ARM: dra76: Add support for device identification Date: Wed, 19 Jul 2017 01:24:57 +0530 Message-ID: <20170718195503.1700-3-lokeshvutla@ti.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170718195503.1700-1-lokeshvutla@ti.com> References: <20170718195503.1700-1-lokeshvutla@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add ID code detection for dra76 SoC. Signed-off-by: Lokesh Vutla --- arch/arm/mach-omap2/id.c | 9 +++++++++ arch/arm/mach-omap2/soc.h | 5 +++++ 2 files changed, 14 insertions(+) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index e2274a162b74..16cb1c195fd8 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -663,6 +663,15 @@ void __init dra7xxx_check_revision(void) hawkeye = (idcode >> 12) & 0xffff; rev = (idcode >> 28) & 0xff; switch (hawkeye) { + case 0xbb50: + switch (rev) { + case 0: + default: + omap_revision = DRA762_REV_ES1_0; + break; + } + break; + case 0xb990: switch (rev) { case 0: diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 2aa01c270898..754cd0fc0e7b 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -167,6 +167,7 @@ IS_TI_SUBCLASS(816x, 0x816) IS_TI_SUBCLASS(814x, 0x814) IS_AM_SUBCLASS(335x, 0x335) IS_AM_SUBCLASS(437x, 0x437) +IS_DRA_SUBCLASS(76x, 0x76) IS_DRA_SUBCLASS(75x, 0x75) IS_DRA_SUBCLASS(72x, 0x72) @@ -185,6 +186,7 @@ IS_DRA_SUBCLASS(72x, 0x72) #define soc_is_omap54xx() 0 #define soc_is_omap543x() 0 #define soc_is_dra7xx() 0 +#define soc_is_dra76x() 0 #define soc_is_dra74x() 0 #define soc_is_dra72x() 0 @@ -314,9 +316,11 @@ IS_OMAP_TYPE(3430, 0x3430) #if defined(CONFIG_SOC_DRA7XX) #undef soc_is_dra7xx +#undef soc_is_dra76x #undef soc_is_dra74x #undef soc_is_dra72x #define soc_is_dra7xx() is_dra7xx() +#define soc_is_dra76x() is_dra76x() #define soc_is_dra74x() is_dra75x() #define soc_is_dra72x() is_dra72x() #endif @@ -386,6 +390,7 @@ IS_OMAP_TYPE(3430, 0x3430) #define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8)) #define DRA7XX_CLASS 0x07000000 +#define DRA762_REV_ES1_0 (DRA7XX_CLASS | (0x62 << 16) | (0x10 << 8)) #define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8)) #define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8)) #define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))