From patchwork Sat Aug 12 04:05:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 9896823 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2C85060351 for ; Sat, 12 Aug 2017 04:10:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2DCDC2811A for ; Sat, 12 Aug 2017 04:10:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2231F28C75; Sat, 12 Aug 2017 04:10:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B88DE2811A for ; Sat, 12 Aug 2017 04:10:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750761AbdHLEK3 (ORCPT ); Sat, 12 Aug 2017 00:10:29 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:19226 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750723AbdHLEK2 (ORCPT ); Sat, 12 Aug 2017 00:10:28 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v7C4ACnQ023074; Fri, 11 Aug 2017 23:10:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1502511012; bh=c+H4PeFPBbo+/TWrv9p0AuZkgrGzI/7NahDYrSuKN14=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QOGzCJgaYPKuybo7kRtOjb6re/JoFX/CtwKrYNUVtMzHOIqxEi7AmEPQKVKGNyFvV GK5MUbknrBCU4JdtAyGyto/1bWsDz8EUSuKxZYe4OEVmU/xy9mH9GdQlhFFGSbfQmv L8PgzeMhGJMjn+Jy0BLKFTKAZNLF7Qopsad+oXyw= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7C4ACXi017962; Fri, 11 Aug 2017 23:10:12 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Fri, 11 Aug 2017 23:10:11 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Fri, 11 Aug 2017 23:10:12 -0500 Received: from a0131933.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7C49xdt015281; Fri, 11 Aug 2017 23:10:08 -0500 From: Lokesh Vutla To: Tony Lindgren , Linux OMAP Mailing List CC: Tero Kristo , Sekhar Nori , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Device Tree Mailing List , Vignesh R , Keerthy , Praneeth Bajjuri , Lokesh Vutla Subject: [PATCH v2 2/8] ARM: dra762: Add support for device identification Date: Sat, 12 Aug 2017 09:35:59 +0530 Message-ID: <20170812040605.21259-3-lokeshvutla@ti.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170812040605.21259-1-lokeshvutla@ti.com> References: <20170812040605.21259-1-lokeshvutla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add ID code detection for dra762 SoC. Signed-off-by: Lokesh Vutla --- arch/arm/mach-omap2/id.c | 9 +++++++++ arch/arm/mach-omap2/soc.h | 5 +++++ 2 files changed, 14 insertions(+) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index e2274a162b74..16cb1c195fd8 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -663,6 +663,15 @@ void __init dra7xxx_check_revision(void) hawkeye = (idcode >> 12) & 0xffff; rev = (idcode >> 28) & 0xff; switch (hawkeye) { + case 0xbb50: + switch (rev) { + case 0: + default: + omap_revision = DRA762_REV_ES1_0; + break; + } + break; + case 0xb990: switch (rev) { case 0: diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 2aa01c270898..754cd0fc0e7b 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -167,6 +167,7 @@ IS_TI_SUBCLASS(816x, 0x816) IS_TI_SUBCLASS(814x, 0x814) IS_AM_SUBCLASS(335x, 0x335) IS_AM_SUBCLASS(437x, 0x437) +IS_DRA_SUBCLASS(76x, 0x76) IS_DRA_SUBCLASS(75x, 0x75) IS_DRA_SUBCLASS(72x, 0x72) @@ -185,6 +186,7 @@ IS_DRA_SUBCLASS(72x, 0x72) #define soc_is_omap54xx() 0 #define soc_is_omap543x() 0 #define soc_is_dra7xx() 0 +#define soc_is_dra76x() 0 #define soc_is_dra74x() 0 #define soc_is_dra72x() 0 @@ -314,9 +316,11 @@ IS_OMAP_TYPE(3430, 0x3430) #if defined(CONFIG_SOC_DRA7XX) #undef soc_is_dra7xx +#undef soc_is_dra76x #undef soc_is_dra74x #undef soc_is_dra72x #define soc_is_dra7xx() is_dra7xx() +#define soc_is_dra76x() is_dra76x() #define soc_is_dra74x() is_dra75x() #define soc_is_dra72x() is_dra72x() #endif @@ -386,6 +390,7 @@ IS_OMAP_TYPE(3430, 0x3430) #define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8)) #define DRA7XX_CLASS 0x07000000 +#define DRA762_REV_ES1_0 (DRA7XX_CLASS | (0x62 << 16) | (0x10 << 8)) #define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8)) #define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8)) #define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))