From patchwork Wed Aug 16 16:50:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Nelson X-Patchwork-Id: 9904159 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7DA63600CA for ; Wed, 16 Aug 2017 16:51:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F96B28A53 for ; Wed, 16 Aug 2017 16:51:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6445028A5E; Wed, 16 Aug 2017 16:51:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BB34128A57 for ; Wed, 16 Aug 2017 16:51:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752138AbdHPQvH (ORCPT ); Wed, 16 Aug 2017 12:51:07 -0400 Received: from mail-io0-f195.google.com ([209.85.223.195]:37262 "EHLO mail-io0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752115AbdHPQvG (ORCPT ); Wed, 16 Aug 2017 12:51:06 -0400 Received: by mail-io0-f195.google.com with SMTP id c74so2595667iod.4; Wed, 16 Aug 2017 09:51:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=qRYuYrD/W3CkGoIfWeCIhPZCBb/i9bwDIz+F5zr+33Q=; b=CZnDYQIat/bOWjfyJy1yPdcsyyV2vmCesCauFzoeThKoUeJBjq5hCnc5jaam6T96O8 VskEAtEAamKga2wJ2beZRTdj9MjZ4Csl4xxz3andISXQfC5qna3uK4yCochH6ZClBNbr tv1+JfVJzD+FOrnA9UPJ3oLhZDdpw59p0fLMbcJ15Z60CdFKfqHPhEuGjfX+kV8FNW9L RWHM3FhUh27I6nnOJigRZVEO1BZE1B0qOEj38tidDVOyl9evPK65bVNg+1+vayqghDBR jrHzaxexpiZFpf20HWz2ohyIxlt2THZ1FaISuWAB21GenSorUWkhVHyXDEyWLgYjTRyH j06A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=qRYuYrD/W3CkGoIfWeCIhPZCBb/i9bwDIz+F5zr+33Q=; b=oSO86g4v+bULkBOjHzanjxSXVEW3NptvE7HCT22fNyjCKMQbuCxBZyWobFqYIujTba +xgXOHFJYPnYbPyI7HWKntjNDhivORnzRR8btfC5rBSlTS67CnFUDec9aHGJQRHcOYbL dPet48XrALiWVDZXdY/20br/L/KLsV3M/vqoXOPbYfswm1dxTsHeKdQ79Lpuf0mrwOkZ vOyZFWvQ13yJFTY0PE6zayGmcxOT6NC7KlVJ5cJ8UTlQL4O0cS9RDG0WHTJULJW+1JhM GsiEryMiiBuxXn1w1j4DdSBCE/ztj/Ycu3KwrD8WCZcwJbHPLfP8Zv8V4wc0V9Qfppnf dxSw== X-Gm-Message-State: AHYfb5hiefSZmPgCEH/d6F44nx8Fw6/CbouVg8lADABqFjIJzusDvLrm nRw8C/EzJvsqhGY5tHw= X-Received: by 10.107.128.203 with SMTP id k72mr1996563ioi.281.1502902265282; Wed, 16 Aug 2017 09:51:05 -0700 (PDT) Received: from hades.VL201.digikey.com ([64.77.213.245]) by smtp.gmail.com with ESMTPSA id k18sm668353itb.40.2017.08.16.09.51.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Aug 2017 09:51:04 -0700 (PDT) From: Robert Nelson To: tony@atomide.com, devicetree@vger.kernel.org Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Robert Nelson , Nishanth Menon , Lokesh Vutla , Kishon Vijay Abraham I , Jason Kridner , Drew Fustini Subject: [PATCH v2] ARM: dts: am57xx-beagle-x15: Add support for rev C Date: Wed, 16 Aug 2017 11:50:53 -0500 Message-Id: <20170816165053.19450-1-robertcnelson@gmail.com> X-Mailer: git-send-email 2.14.1 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Latest update to the BeagleBoard-X15 platform (revision C). This board contains a silicon update (Rev 2.0), which includes a fix for the 2nd ethernet phy when running at 1000 Mbps speeds. This board can be indentified by the [C.00] after [BBRDX15_] in the at24 eeprom: [BBRDX15_C.001731PX150249] Rev C is now in full production and boards are available for end users. https://beagleboard.org/x15 https://github.com/beagleboard/beagleboard-x15/ Signed-off-by: Robert Nelson CC: Tony Lindgren CC: Nishanth Menon CC: Lokesh Vutla CC: Kishon Vijay Abraham I CC: Jason Kridner CC: Drew Fustini --- v2: Rework based on Kishon's [PATCH v2 00/10] ARM: dts: Add iodelay data for MMC --- --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/am57xx-beagle-x15-revc.dts | 39 ++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) create mode 100644 arch/arm/boot/dts/am57xx-beagle-x15-revc.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 570e107bf702..d51c0def01de 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -656,6 +656,7 @@ dtb-$(CONFIG_SOC_OMAP5) += \ dtb-$(CONFIG_SOC_DRA7XX) += \ am57xx-beagle-x15.dtb \ am57xx-beagle-x15-revb1.dtb \ + am57xx-beagle-x15-revc.dtb \ am57xx-cl-som-am57x.dtb \ am57xx-sbc-am57x.dtb \ am572x-idk.dtb \ diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-revc.dts b/arch/arm/boot/dts/am57xx-beagle-x15-revc.dts new file mode 100644 index 000000000000..17c41da3b55f --- /dev/null +++ b/arch/arm/boot/dts/am57xx-beagle-x15-revc.dts @@ -0,0 +1,39 @@ +/* + * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "am57xx-beagle-x15-common.dtsi" + +/ { + model = "TI AM5728 BeagleBoard-X15 rev C"; +}; + +&tpd12s015 { + gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */ + <&gpio2 30 GPIO_ACTIVE_HIGH>, /* gpio2_30, LS OE */ + <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */ +}; + +&mmc1 { + pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_hs>; + pinctrl-2 = <&mmc1_pins_sdr12>; + pinctrl-3 = <&mmc1_pins_sdr25>; + pinctrl-4 = <&mmc1_pins_sdr50>; + pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>; + pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; + vmmc-supply = <&vdd_3v3>; + vqmmc-supply = <&ldo1_reg>; +}; + +&mmc2 { + pinctrl-names = "default", "hs", "ddr_1_8v"; + pinctrl-0 = <&mmc2_pins_default>; + pinctrl-1 = <&mmc2_pins_hs>; + pinctrl-2 = <&mmc2_pins_ddr_rev20>; +};