From patchwork Mon Aug 21 23:51:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 9913973 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 412DF602D8 for ; Mon, 21 Aug 2017 23:52:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2F8CE23F88 for ; Mon, 21 Aug 2017 23:52:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 242C128635; Mon, 21 Aug 2017 23:52:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9C1EB23F88 for ; Mon, 21 Aug 2017 23:52:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754353AbdHUXwZ (ORCPT ); Mon, 21 Aug 2017 19:52:25 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:45957 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754044AbdHUXwY (ORCPT ); Mon, 21 Aug 2017 19:52:24 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v7LNq0HF028517; Mon, 21 Aug 2017 18:52:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1503359521; bh=ogpxcIFOSQwaQLSpEpBcaHbmHA3QncbVrjPQCr8/sBg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=YjS33eye3R2EQqkGsdcxPICEV0v3QjrnyBW4PFiZJO8VZgEIzZYIBNnR+7uGhohpF 1VyX/MjGiMSBwbei9B+ynWhOPCbMPy3Aj7kvenaMsUkzHK1cNhm/XUEo5L2Pz1TxXM kyajqPWwoClxvqM+RMo9PgpZoyHJpRnIMsQ9IhBs= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7LNq0Jb009694; Mon, 21 Aug 2017 18:52:00 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Mon, 21 Aug 2017 18:52:00 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Mon, 21 Aug 2017 18:52:00 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7LNq0NN001440; Mon, 21 Aug 2017 18:52:00 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id v7LNq0307303; Mon, 21 Aug 2017 18:52:00 -0500 (CDT) From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 5/5] ARM: dts: am571x-idk: Enable relevant IPU and DSP MMU nodes Date: Mon, 21 Aug 2017 18:51:58 -0500 Message-ID: <20170821235158.4968-6-s-anna@ti.com> X-Mailer: git-send-email 2.13.1 In-Reply-To: <20170821235158.4968-1-s-anna@ti.com> References: <20170821235158.4968-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The MMU nodes for the remote processors IPU1, IPU2 and DSP1 have all been enabled. All these nodes are relevant and valid for the AM571x IDK board. DSP2 MMU nodes are not present on AM571x SoCs. Signed-off-by: Suman Anna --- arch/arm/boot/dts/am571x-idk.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/am571x-idk.dts b/arch/arm/boot/dts/am571x-idk.dts index debf9464403e..ea9f695e1282 100644 --- a/arch/arm/boot/dts/am571x-idk.dts +++ b/arch/arm/boot/dts/am571x-idk.dts @@ -91,6 +91,22 @@ }; }; +&mmu0_dsp1 { + status = "okay"; +}; + +&mmu1_dsp1 { + status = "okay"; +}; + +&mmu_ipu1 { + status = "okay"; +}; + +&mmu_ipu2 { + status = "okay"; +}; + &pcie1_rc { status = "okay"; gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;