From patchwork Wed Sep 20 19:26:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 9962171 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 756E860208 for ; Wed, 20 Sep 2017 19:26:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 681CD291FA for ; Wed, 20 Sep 2017 19:26:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5CF51291FC; Wed, 20 Sep 2017 19:26:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D8BAB291FA for ; Wed, 20 Sep 2017 19:26:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751693AbdITT00 (ORCPT ); Wed, 20 Sep 2017 15:26:26 -0400 Received: from mail-wr0-f171.google.com ([209.85.128.171]:54986 "EHLO mail-wr0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751524AbdITT0Z (ORCPT ); Wed, 20 Sep 2017 15:26:25 -0400 Received: by mail-wr0-f171.google.com with SMTP id g29so2966265wrg.11 for ; Wed, 20 Sep 2017 12:26:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qkU6gyL641/uBiMyQ4XIIcOD1X239xPduwowlrxRDbM=; b=W2LsjtfbL50UtuLVDrDGEoqkqLR7mbE2w1in4HMgCycwU9sblKSbyWfMhB51nr2SAU JuN+jf5MjYyCfqVbD2q0zW34tfqngTT5gf/N5iQ7rn11+caGjmdpGl+SsuEkA0ojn1bz FrQmHSjPYbHSf16ZdDymBI/Md/s0zhdgdHIMsfXS6J8pbeLQ42VfaNqNRnRa8yAE0l6o ntwu98UG3QZF6zsMfQiedeR4FDqIKL6HR44nlYEPRYSpBEscGwLV45T9pxa+fPrmDX9C eh05mKcWA2X5rkOAibjH1i9hyNXJE19Ye6CLVglu4Z2apgYSBGid48Lg0EKeItR/crfG Drag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qkU6gyL641/uBiMyQ4XIIcOD1X239xPduwowlrxRDbM=; b=cIpeyos9HNR+H15vnOyMyCWvMEsXsAXw17YWZhAyJsZYlQ9mBs3nQoJQ4BIYEZ5KZZ xGZyqeqSkj9Yg5pbW7PVSqrigARX4Ng5Jw7Pd7j7wPXAolZDXBlJJDZdBSTKbmeIt/hw 9am9pPkl196CpItAa4JEyHQXP2ARoBroRT4fgd9lFIfd/5UIWQ5NWckpbYg8Yt+oie3U KrKUOKYF4kn4BpYtAFgce2EB8GCKvP46DBD5Ox6z9pKchtEyFA7zc/PfnGh6QWqvtJnX 9qB6EDV134VHP+Ya67VJ95M4jAIGLudNE9qifJWfMhKZ7wVL59aZDv6CE6WWkGPuGoDm akOQ== X-Gm-Message-State: AHPjjUgpG9bVLQ3HxJ/PvXJ0GbXn8k1Qpu2/Zm0RIY8AFj8eW6pT+vp3 W7h++bFJKnNBeAGK7T+t9qjtAw== X-Google-Smtp-Source: AOwi7QD7Puqrxxcj4ERzGXHHyNJ3RqnDLerRxFzdw4RR6ORs6/y9PZYoFYsx2mA0aa926R7Gc0UiIw== X-Received: by 10.223.153.169 with SMTP id y38mr6025460wrb.46.1505935583747; Wed, 20 Sep 2017 12:26:23 -0700 (PDT) Received: from localhost.localdomain (car75-h02-176-137-58-115.dsl.sta.abo.bbox.fr. [176.137.58.115]) by smtp.gmail.com with ESMTPSA id u40sm2680796wrb.21.2017.09.20.12.26.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Sep 2017 12:26:23 -0700 (PDT) From: Alexandre Bailon To: b-liu@ti.com Cc: linux-usb@vger.kernel.org, nsekhar@ti.com, ptitiano@baylibre.com, sergei.shtylyov@cogentembedded.com, linux-omap@vger.kernel.org, Alexandre Bailon Subject: [PATCH v3 3/4] usb: musb: musb_cppi41: Configure the number of channels for DA8xx Date: Wed, 20 Sep 2017 21:26:11 +0200 Message-Id: <20170920192612.16169-4-abailon@baylibre.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170920192612.16169-1-abailon@baylibre.com> References: <20170920192612.16169-1-abailon@baylibre.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently, the number of channels is set to 15 but in the case of DA8xx, the number of channels is 4. Update the driver to configure the number of channels at runtime. Signed-off-by: Alexandre Bailon --- drivers/usb/musb/musb_cppi41.c | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) diff --git a/drivers/usb/musb/musb_cppi41.c b/drivers/usb/musb/musb_cppi41.c index b2b1306c01cf..1ec0a4947b6b 100644 --- a/drivers/usb/musb/musb_cppi41.c +++ b/drivers/usb/musb/musb_cppi41.c @@ -30,10 +30,12 @@ #define DA8XX_USB_AUTOREQ 0x14 #define DA8XX_USB_TEARDOWN 0x1c +#define DA8XX_DMA_NUM_CHANNELS 4 + struct cppi41_dma_controller { struct dma_controller controller; - struct cppi41_dma_channel rx_channel[MUSB_DMA_NUM_CHANNELS]; - struct cppi41_dma_channel tx_channel[MUSB_DMA_NUM_CHANNELS]; + struct cppi41_dma_channel *rx_channel; + struct cppi41_dma_channel *tx_channel; struct hrtimer early_tx; struct list_head early_tx_list; u32 rx_mode; @@ -45,6 +47,7 @@ struct cppi41_dma_controller { void (*set_dma_mode)(struct cppi41_dma_channel *cppi41_channel, unsigned int mode); + u8 num_channels; }; static void save_rx_toggle(struct cppi41_dma_channel *cppi41_channel) @@ -483,7 +486,7 @@ static struct dma_channel *cppi41_dma_channel_allocate(struct dma_controller *c, struct cppi41_dma_channel *cppi41_channel = NULL; u8 ch_num = hw_ep->epnum - 1; - if (ch_num >= MUSB_DMA_NUM_CHANNELS) + if (ch_num >= controller->num_channels) return NULL; if (is_tx) @@ -643,7 +646,7 @@ static void cppi41_release_all_dma_chans(struct cppi41_dma_controller *ctrl) struct dma_chan *dc; int i; - for (i = 0; i < MUSB_DMA_NUM_CHANNELS; i++) { + for (i = 0; i < ctrl->num_channels; i++) { dc = ctrl->tx_channel[i].dc; if (dc) dma_release_channel(dc); @@ -695,7 +698,7 @@ static int cppi41_dma_controller_start(struct cppi41_dma_controller *controller) goto err; ret = -EINVAL; - if (port > MUSB_DMA_NUM_CHANNELS || !port) + if (port > controller->num_channels || !port) goto err; if (is_tx) cppi41_channel = &controller->tx_channel[port - 1]; @@ -736,6 +739,8 @@ void cppi41_dma_controller_destroy(struct dma_controller *c) hrtimer_cancel(&controller->early_tx); cppi41_dma_controller_stop(controller); + kfree(controller->rx_channel); + kfree(controller->tx_channel); kfree(controller); } EXPORT_SYMBOL_GPL(cppi41_dma_controller_destroy); @@ -744,6 +749,7 @@ struct dma_controller * cppi41_dma_controller_create(struct musb *musb, void __iomem *base) { struct cppi41_dma_controller *controller; + int channel_size; int ret = 0; if (!musb->controller->parent->of_node) { @@ -770,18 +776,33 @@ cppi41_dma_controller_create(struct musb *musb, void __iomem *base) controller->tdown_reg = DA8XX_USB_TEARDOWN; controller->autoreq_reg = DA8XX_USB_AUTOREQ; controller->set_dma_mode = da8xx_set_dma_mode; + controller->num_channels = DA8XX_DMA_NUM_CHANNELS; } else { controller->tdown_reg = USB_TDOWN; controller->autoreq_reg = USB_CTRL_AUTOREQ; controller->set_dma_mode = cppi41_set_dma_mode; + controller->num_channels = MUSB_DMA_NUM_CHANNELS; } + channel_size = controller->num_channels * + sizeof(struct cppi41_dma_channel); + controller->rx_channel = kzalloc(channel_size, GFP_KERNEL); + if (!controller->rx_channel) + goto rx_channel_alloc_fail; + controller->tx_channel = kzalloc(channel_size, GFP_KERNEL); + if (!controller->tx_channel) + goto tx_channel_alloc_fail; + ret = cppi41_dma_controller_start(controller); if (ret) goto plat_get_fail; return &controller->controller; plat_get_fail: + kfree(controller->tx_channel); +tx_channel_alloc_fail: + kfree(controller->rx_channel); +rx_channel_alloc_fail: kfree(controller); kzalloc_fail: if (ret == -EPROBE_DEFER)