@@ -137,7 +137,6 @@ static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg,
static int omap2_onenand_calc_sync_timings(struct gpmc_timings *t,
struct gpmc_settings *s,
- unsigned int flags,
int freq)
{
struct gpmc_device_timings dev_t;
@@ -149,11 +148,6 @@ static int omap2_onenand_calc_sync_timings(struct gpmc_timings *t,
int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo;
int div, gpmc_clk_ns, latency;
- if (flags & ONENAND_SYNC_READ)
- onenand_flags = ONENAND_FLAG_SYNCREAD;
- else if (flags & ONENAND_SYNC_READWRITE)
- onenand_flags = ONENAND_FLAG_SYNCREAD | ONENAND_FLAG_SYNCWRITE;
-
switch (freq) {
case 104:
min_gpmc_clk_period = 9600; /* 104 MHz */
@@ -253,10 +247,9 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base)
*/
gpmc_read_settings_dt(gpmc_onenand_data->of_node, &s);
if (s.sync_read || s.sync_write) {
+ onenand_flags |= ONENAND_FLAG_SYNCREAD;
if (s.sync_write)
- gpmc_onenand_data->flags |= ONENAND_SYNC_READWRITE;
- else
- gpmc_onenand_data->flags |= ONENAND_SYNC_READ;
+ onenand_flags |= ONENAND_FLAG_SYNCWRITE;
s.sync_read = false;
}
@@ -291,9 +284,7 @@ static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr)
gpmc_read_settings_dt(gpmc_onenand_data->of_node, &s);
- latency = omap2_onenand_calc_sync_timings(&t, &s,
- gpmc_onenand_data->flags,
- freq);
+ latency = omap2_onenand_calc_sync_timings(&t, &s, freq);
ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &s);
if (ret < 0)
@@ -313,7 +304,7 @@ static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr)
static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
{
struct device *dev = &gpmc_onenand_device.dev;
- unsigned l = ONENAND_SYNC_READ | ONENAND_SYNC_READWRITE;
+ unsigned l = ONENAND_FLAG_SYNCREAD | ONENAND_FLAG_SYNCWRITE;
int ret;
ret = omap2_onenand_setup_async(onenand_base);
@@ -322,7 +313,7 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
return ret;
}
- if (!(gpmc_onenand_data->flags & l))
+ if (!(onenand_flags & l))
return 0;
ret = omap2_onenand_setup_sync(onenand_base, freq_ptr);
@@ -340,13 +331,6 @@ int gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
gpmc_onenand_data->onenand_setup = gpmc_onenand_setup;
gpmc_onenand_device.dev.platform_data = gpmc_onenand_data;
- if (cpu_is_omap24xx() &&
- (gpmc_onenand_data->flags & ONENAND_SYNC_READWRITE)) {
- dev_warn(dev, "OneNAND using only SYNC_READ on 24xx\n");
- gpmc_onenand_data->flags &= ~ONENAND_SYNC_READWRITE;
- gpmc_onenand_data->flags |= ONENAND_SYNC_READ;
- }
-
if (cpu_is_omap34xx())
gpmc_onenand_data->flags |= ONENAND_IN_OMAP34XX;
else
Currently gpmc_onenand_data->flags is initially set to zero, thus we can stop using this field at all and rely on DT settings only. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> --- arch/arm/mach-omap2/gpmc-onenand.c | 26 +++++--------------------- 1 file changed, 5 insertions(+), 21 deletions(-)