From patchwork Sun Oct 15 23:19:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ladislav Michl X-Patchwork-Id: 10007327 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4A0C460230 for ; Sun, 15 Oct 2017 23:19:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3A2B726212 for ; Sun, 15 Oct 2017 23:19:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2F180262FF; Sun, 15 Oct 2017 23:19:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 94B4F26212 for ; Sun, 15 Oct 2017 23:19:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751382AbdJOXTi (ORCPT ); Sun, 15 Oct 2017 19:19:38 -0400 Received: from eddie.linux-mips.org ([148.251.95.138]:44780 "EHLO cvs.linux-mips.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751235AbdJOXTi (ORCPT ); Sun, 15 Oct 2017 19:19:38 -0400 Received: (from localhost user: 'ladis' uid#1021 fake: STDIN (ladis@eddie.linux-mips.org)) by eddie.linux-mips.org id S23990398AbdJOXThYG7-K (ORCPT ); Mon, 16 Oct 2017 01:19:37 +0200 Date: Mon, 16 Oct 2017 01:19:36 +0200 From: Ladislav Michl To: linux-omap@vger.kernel.org Cc: Roger Quadros , Tony Lindgren Subject: [PATCH 05/11] ARM: OMAP2+: gpmc-onenand: Drop global flags variable Message-ID: <20171015231936.4sh36psxfke575tc@lenoch> References: <20171015231641.zt5fz6fidp5eczf6@lenoch> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20171015231641.zt5fz6fidp5eczf6@lenoch> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Sync-read and sync-write flags are read from DT, therefore global onenand_flags variable can be removed. Signed-off-by: Ladislav Michl --- arch/arm/mach-omap2/gpmc-onenand.c | 60 ++++++++++++++------------------------ 1 file changed, 22 insertions(+), 38 deletions(-) diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c index 5bdca62fdd54..10e80bdde5ee 100644 --- a/arch/arm/mach-omap2/gpmc-onenand.c +++ b/arch/arm/mach-omap2/gpmc-onenand.c @@ -25,11 +25,6 @@ #define ONENAND_IO_SIZE SZ_128K -#define ONENAND_FLAG_SYNCREAD (1 << 0) -#define ONENAND_FLAG_SYNCWRITE (1 << 1) - -static unsigned onenand_flags; - static struct omap_onenand_platform_data *gpmc_onenand_data; static struct resource gpmc_onenand_resource = { @@ -83,7 +78,8 @@ static void omap2_onenand_set_async_mode(void __iomem *onenand_base) writew(reg, onenand_base + ONENAND_REG_SYS_CFG1); } -static void set_onenand_cfg(void __iomem *onenand_base, int latency) +static void set_onenand_cfg(void __iomem *onenand_base, + bool sr, bool sw, int latency) { u32 reg = ONENAND_SYS_CFG1_RDY | ONENAND_SYS_CFG1_INT; @@ -93,14 +89,10 @@ static void set_onenand_cfg(void __iomem *onenand_base, int latency) reg |= ONENAND_SYS_CFG1_HF; if (latency > 7) reg |= ONENAND_SYS_CFG1_VHF; - if (onenand_flags & ONENAND_FLAG_SYNCREAD) + if (sr) reg |= ONENAND_SYS_CFG1_SYNC_READ; - else - reg &= ~ONENAND_SYS_CFG1_SYNC_READ; - if (onenand_flags & ONENAND_FLAG_SYNCWRITE) + if (sw) reg |= ONENAND_SYS_CFG1_SYNC_WRITE; - else - reg &= ~ONENAND_SYS_CFG1_SYNC_WRITE; writew(reg, onenand_base + ONENAND_REG_SYS_CFG1); } @@ -148,6 +140,9 @@ static int omap2_onenand_calc_sync_timings(struct gpmc_timings *t, int min_gpmc_clk_period, t_ces, t_avds, t_avdh, t_ach, t_aavdh, t_rdyo; int div, gpmc_clk_ns, latency; + if (!s->sync_read && !s->sync_write) + return 0; + switch (freq) { case 104: min_gpmc_clk_period = 9600; /* 104 MHz */ @@ -184,7 +179,8 @@ static int omap2_onenand_calc_sync_timings(struct gpmc_timings *t, t_ach = 9; t_aavdh = 7; t_rdyo = 15; - onenand_flags &= ~ONENAND_FLAG_SYNCWRITE; + s->sync_write = false; + s->burst_write = false; break; } @@ -202,12 +198,7 @@ static int omap2_onenand_calc_sync_timings(struct gpmc_timings *t, /* Set synchronous read timings */ memset(&dev_t, 0, sizeof(dev_t)); - if (onenand_flags & ONENAND_FLAG_SYNCREAD) - s->sync_read = true; - if (onenand_flags & ONENAND_FLAG_SYNCWRITE) { - s->sync_write = true; - s->burst_write = true; - } else { + if (!s->sync_write) { dev_t.t_avdp_w = max(t_avdp, t_cer) * 1000; dev_t.t_wpl = t_wpl * 1000; dev_t.t_wph = t_wph * 1000; @@ -246,14 +237,9 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base) * supported clock rate for the sync timings. */ gpmc_read_settings_dt(gpmc_onenand_data->of_node, &s); - if (s.sync_read || s.sync_write) { - onenand_flags |= ONENAND_FLAG_SYNCREAD; - if (s.sync_write) - onenand_flags |= ONENAND_FLAG_SYNCWRITE; - s.sync_read = false; - } - + s.sync_read = false; s.sync_write = true; + omap2_onenand_calc_async_timings(&t, &s); ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &s); @@ -285,16 +271,18 @@ static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr) gpmc_read_settings_dt(gpmc_onenand_data->of_node, &s); latency = omap2_onenand_calc_sync_timings(&t, &s, freq); + if (latency > 0) { + ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &s); + if (ret < 0) + return ret; - ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &s); - if (ret < 0) - return ret; + ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t, &s); + if (ret < 0) + return ret; - ret = gpmc_cs_set_timings(gpmc_onenand_data->cs, &t, &s); - if (ret < 0) - return ret; - - set_onenand_cfg(onenand_base, latency); + set_onenand_cfg(onenand_base, s.sync_read, s.sync_write, + latency); + } *freq_ptr = freq; @@ -304,7 +292,6 @@ static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr) static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr) { struct device *dev = &gpmc_onenand_device.dev; - unsigned l = ONENAND_FLAG_SYNCREAD | ONENAND_FLAG_SYNCWRITE; int ret; ret = omap2_onenand_setup_async(onenand_base); @@ -313,9 +300,6 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr) return ret; } - if (!(onenand_flags & l)) - return 0; - ret = omap2_onenand_setup_sync(onenand_base, freq_ptr); if (ret) dev_err(dev, "unable to set to sync mode\n");