From patchwork Mon Oct 30 12:42:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 10032451 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D61BC603B4 for ; Mon, 30 Oct 2017 12:45:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C4C8728868 for ; Mon, 30 Oct 2017 12:45:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B9B622886D; Mon, 30 Oct 2017 12:45:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5793228868 for ; Mon, 30 Oct 2017 12:45:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751643AbdJ3Mn0 (ORCPT ); Mon, 30 Oct 2017 08:43:26 -0400 Received: from bastet.se.axis.com ([195.60.68.11]:43056 "EHLO bastet.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752197AbdJ3MnY (ORCPT ); Mon, 30 Oct 2017 08:43:24 -0400 Received: from localhost (localhost [127.0.0.1]) by bastet.se.axis.com (Postfix) with ESMTP id E115A185A2; Mon, 30 Oct 2017 13:43:22 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at bastet.se.axis.com Received: from bastet.se.axis.com ([IPv6:::ffff:127.0.0.1]) by localhost (bastet.se.axis.com [::ffff:127.0.0.1]) (amavisd-new, port 10024) with LMTP id ElqB0UMdEzpf; Mon, 30 Oct 2017 13:43:20 +0100 (CET) Received: from boulder03.se.axis.com (boulder03.se.axis.com [10.0.8.17]) by bastet.se.axis.com (Postfix) with ESMTPS id 862A3185A4; Mon, 30 Oct 2017 13:43:20 +0100 (CET) Received: from boulder03.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 71FCE1E066; Mon, 30 Oct 2017 13:43:20 +0100 (CET) Received: from boulder03.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6665F1E060; Mon, 30 Oct 2017 13:43:20 +0100 (CET) Received: from thoth.se.axis.com (unknown [10.0.2.173]) by boulder03.se.axis.com (Postfix) with ESMTP; Mon, 30 Oct 2017 13:43:20 +0100 (CET) Received: from lnxartpec1.se.axis.com (lnxartpec1.se.axis.com [10.88.4.10]) by thoth.se.axis.com (Postfix) with ESMTP id 599F61FC0; Mon, 30 Oct 2017 13:43:20 +0100 (CET) Received: by lnxartpec1.se.axis.com (Postfix, from userid 20283) id 53F8F40101; Mon, 30 Oct 2017 13:43:20 +0100 (CET) From: Niklas Cassel To: Kishon Vijay Abraham I , Bjorn Helgaas Cc: Niklas Cassel , linux-omap@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 09/17] PCI: dwc: dra7xx: Add ifdefs for host/ep specific code Date: Mon, 30 Oct 2017 13:42:12 +0100 Message-Id: <20171030124221.20690-10-niklas.cassel@axis.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20171030124221.20690-1-niklas.cassel@axis.com> References: <20171030124221.20690-1-niklas.cassel@axis.com> X-TM-AS-GCONF: 00 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This way you will not build and include unused code when only building for only one mode. Moved dra7xx_pcie_enable_wrapper_interrupts() in order to avoid adding an extra ifdef block. Signed-off-by: Niklas Cassel --- V2: * New patch in this series. drivers/pci/dwc/pci-dra7xx.c | 36 ++++++++++++++++++++++++++++-------- 1 file changed, 28 insertions(+), 8 deletions(-) diff --git a/drivers/pci/dwc/pci-dra7xx.c b/drivers/pci/dwc/pci-dra7xx.c index 009f6aeeee1c..175544d6c3ab 100644 --- a/drivers/pci/dwc/pci-dra7xx.c +++ b/drivers/pci/dwc/pci-dra7xx.c @@ -171,6 +171,15 @@ static int dra7xx_pcie_establish_link(struct dw_pcie *pci) return 0; } +static void dra7xx_pcie_enable_wrapper_interrupts(struct dra7xx_pcie *dra7xx) +{ + dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN, + INTERRUPTS); + dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MAIN, + INTERRUPTS); +} + +#ifdef CONFIG_PCI_DRA7XX_HOST static void dra7xx_pcie_enable_msi_interrupts(struct dra7xx_pcie *dra7xx) { dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI, @@ -181,14 +190,6 @@ static void dra7xx_pcie_enable_msi_interrupts(struct dra7xx_pcie *dra7xx) MSI | LEG_EP_INTERRUPTS); } -static void dra7xx_pcie_enable_wrapper_interrupts(struct dra7xx_pcie *dra7xx) -{ - dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MAIN, - INTERRUPTS); - dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_IRQENABLE_SET_MAIN, - INTERRUPTS); -} - static void dra7xx_pcie_enable_interrupts(struct dra7xx_pcie *dra7xx) { dra7xx_pcie_enable_wrapper_interrupts(dra7xx); @@ -276,6 +277,7 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) return IRQ_HANDLED; } +#endif static irqreturn_t dra7xx_pcie_irq_handler(int irq, void *arg) { @@ -336,6 +338,7 @@ static irqreturn_t dra7xx_pcie_irq_handler(int irq, void *arg) return IRQ_HANDLED; } +#ifdef CONFIG_PCI_DRA7XX_EP static void dra7xx_pcie_ep_init(struct dw_pcie_ep *ep) { struct dw_pcie *pci = to_dw_pcie_from_ep(ep); @@ -427,7 +430,9 @@ static int __init dra7xx_add_pcie_ep(struct dra7xx_pcie *dra7xx, return 0; } +#endif +#ifdef CONFIG_PCI_DRA7XX_HOST static int __init dra7xx_add_pcie_port(struct dra7xx_pcie *dra7xx, struct platform_device *pdev) { @@ -470,6 +475,7 @@ static int __init dra7xx_add_pcie_port(struct dra7xx_pcie *dra7xx, return 0; } +#endif static const struct dw_pcie_ops dw_pcie_ops = { .cpu_addr_fixup = dra7xx_pcie_cpu_addr_fixup, @@ -517,23 +523,31 @@ static int dra7xx_pcie_enable_phy(struct dra7xx_pcie *dra7xx) return ret; } +#ifdef CONFIG_PCI_DRA7XX_HOST static const struct dra7xx_pcie_of_data dra7xx_pcie_rc_of_data = { .mode = DW_PCIE_RC_TYPE, }; +#endif +#ifdef CONFIG_PCI_DRA7XX_EP static const struct dra7xx_pcie_of_data dra7xx_pcie_ep_of_data = { .mode = DW_PCIE_EP_TYPE, }; +#endif static const struct of_device_id of_dra7xx_pcie_match[] = { +#ifdef CONFIG_PCI_DRA7XX_HOST { .compatible = "ti,dra7-pcie", .data = &dra7xx_pcie_rc_of_data, }, +#endif +#ifdef CONFIG_PCI_DRA7XX_EP { .compatible = "ti,dra7-pcie-ep", .data = &dra7xx_pcie_ep_of_data, }, +#endif {}, }; @@ -548,6 +562,7 @@ static const struct of_device_id of_dra7xx_pcie_match[] = { * * To avoid this issue set PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE to 1. */ +#ifdef CONFIG_PCI_DRA7XX_EP static int dra7xx_pcie_ep_unaligned_memaccess(struct device *dev) { int ret; @@ -578,6 +593,7 @@ static int dra7xx_pcie_ep_unaligned_memaccess(struct device *dev) return ret; } +#endif static int __init dra7xx_pcie_probe(struct platform_device *pdev) { @@ -681,6 +697,7 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) dra7xx->link_gen = 2; switch (mode) { +#ifdef CONFIG_PCI_DRA7XX_HOST case DW_PCIE_RC_TYPE: dra7xx_pcie_writel(dra7xx, PCIECTRL_TI_CONF_DEVICE_TYPE, DEVICE_TYPE_RC); @@ -688,6 +705,8 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) if (ret < 0) goto err_gpio; break; +#endif +#ifdef CONFIG_PCI_DRA7XX_EP case DW_PCIE_EP_TYPE: dra7xx_pcie_writel(dra7xx, PCIECTRL_TI_CONF_DEVICE_TYPE, DEVICE_TYPE_EP); @@ -700,6 +719,7 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) if (ret < 0) goto err_gpio; break; +#endif default: dev_err(dev, "INVALID device type %d\n", mode); }