From patchwork Thu Dec 14 13:40:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 10112147 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DF0E760352 for ; Thu, 14 Dec 2017 13:43:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CFF7D28F6A for ; Thu, 14 Dec 2017 13:43:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C2D3D29025; Thu, 14 Dec 2017 13:43:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6B9E828F6A for ; Thu, 14 Dec 2017 13:43:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752792AbdLNNm1 (ORCPT ); Thu, 14 Dec 2017 08:42:27 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:51770 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752641AbdLNNmZ (ORCPT ); Thu, 14 Dec 2017 08:42:25 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBEDfn6n009669; Thu, 14 Dec 2017 07:41:49 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513258909; bh=WBwTbvCKdqtFuoUpJb75hq3rxewumsN0P+8hDINL3EM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=xkxOTI4h0kBSI5z2M+2LLz8LhJCisQ1ATf0FfkzJAWTPKRYVWYt0h0s4T2qRiYWdk rVUjvZxp6RLgyEz1Zwq9jQPwT4ae9zqdALKrmq8V4b3fEQ1hX60CUgCqT7I6aDmMBW sIPDKaVHh8q0giqHDgmV5bebFIGTE/syE9Da/jhI= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDfnn5030460; Thu, 14 Dec 2017 07:41:49 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 14 Dec 2017 07:41:49 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 14 Dec 2017 07:41:49 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDewBP009855; Thu, 14 Dec 2017 07:41:46 -0600 From: Kishon Vijay Abraham I To: Tony Lindgren , , Santosh Shilimkar CC: Rob Herring , Mark Rutland , Russell King , , , , , , , Subject: [PATCH 12/14] ARM: dts: am57xx-idk: Select pull down for mmc1_clk line in default mode Date: Thu, 14 Dec 2017 19:10:52 +0530 Message-ID: <20171214134054.7749-13-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171214134054.7749-1-kishon@ti.com> References: <20171214134054.7749-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP During a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type. According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK low for at least 5ms. In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down. This is specific to am57xx-idk (and not all dra72/dra74 based boards) since mmc1_clk line in am57xx-idk is not connected to an external pullup. While at that change the order of header files in am571x-idk.dts and am572x-idk.dts so that the modified pinctrl values in am57xx-idk-common could take effect. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/am571x-idk.dts | 2 +- arch/arm/boot/dts/am572x-idk.dts | 2 +- arch/arm/boot/dts/am57xx-idk-common.dtsi | 11 +++++++++++ 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/am571x-idk.dts b/arch/arm/boot/dts/am571x-idk.dts index debf9464403e..c7d77acffa28 100644 --- a/arch/arm/boot/dts/am571x-idk.dts +++ b/arch/arm/boot/dts/am571x-idk.dts @@ -10,8 +10,8 @@ #include "dra72x.dtsi" #include #include -#include "am57xx-idk-common.dtsi" #include "dra72x-mmc-iodelay.dtsi" +#include "am57xx-idk-common.dtsi" / { model = "TI AM5718 IDK"; diff --git a/arch/arm/boot/dts/am572x-idk.dts b/arch/arm/boot/dts/am572x-idk.dts index a578fe97ba3b..144376ad5f35 100644 --- a/arch/arm/boot/dts/am572x-idk.dts +++ b/arch/arm/boot/dts/am572x-idk.dts @@ -11,8 +11,8 @@ #include "dra74x.dtsi" #include #include -#include "am57xx-idk-common.dtsi" #include "dra74x-mmc-iodelay.dtsi" +#include "am57xx-idk-common.dtsi" / { model = "TI AM5728 IDK"; diff --git a/arch/arm/boot/dts/am57xx-idk-common.dtsi b/arch/arm/boot/dts/am57xx-idk-common.dtsi index 43a6d0590f7c..43cdf523a8a0 100644 --- a/arch/arm/boot/dts/am57xx-idk-common.dtsi +++ b/arch/arm/boot/dts/am57xx-idk-common.dtsi @@ -115,6 +115,17 @@ DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */ >; }; + + mmc1_pins_default: mmc1_pins_default { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */ + DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ + DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ + DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ + DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ + DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ + >; + }; }; &i2c1 {