From patchwork Fri Apr 27 08:17:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 10367671 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 98BAC601D3 for ; Fri, 27 Apr 2018 08:17:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8D38829322 for ; Fri, 27 Apr 2018 08:17:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 824AC29323; Fri, 27 Apr 2018 08:17:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 36E6529325 for ; Fri, 27 Apr 2018 08:17:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757642AbeD0IRN (ORCPT ); Fri, 27 Apr 2018 04:17:13 -0400 Received: from fllnx210.ext.ti.com ([198.47.19.17]:39543 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757835AbeD0IRM (ORCPT ); Fri, 27 Apr 2018 04:17:12 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w3R8GlXI007681; Fri, 27 Apr 2018 03:16:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1524817007; bh=KobTijtUyxlNxc6ONzLcOmpdqlakYMp7C2FvBaJomZE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=nul076pA+sBg33ZSuNwS4p8dI6wjeHL5/81+BfAd+xU2z7T85dwFs8MVlksCFiJRT 4/qIqndCSwbE+Bk/JT2uTO35IySSqQ35Hf7+imKu8gjpWnxb7jKdtYKvHsa+rRj0+L dy3Ax9zNa66soqAlQhCJYUoL+n0WGu91w0zU2TmI= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3R8GlcZ019340; Fri, 27 Apr 2018 03:16:47 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Fri, 27 Apr 2018 03:16:47 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Fri, 27 Apr 2018 03:16:47 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3R8GgBq012074; Fri, 27 Apr 2018 03:16:45 -0500 From: Peter Ujfalusi To: Mark Brown , Liam Girdwood , , CC: , , Subject: [PATCH v2 1/6] ARM: dts: omap2420-n810: Enable McBSP2 for audio Date: Fri, 27 Apr 2018 11:17:10 +0300 Message-ID: <20180427081715.28791-2-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180427081715.28791-1-peter.ujfalusi@ti.com> References: <20180427081715.28791-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP McBSP2 is used with the tlv320aic33 codec for audio. Pin mux change is needed to get the needed signals in/out from the SoC. Signed-off-by: Peter Ujfalusi Tested-by: Jarkko Nikula --- arch/arm/boot/dts/omap2420-n810.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/omap2420-n810.dts b/arch/arm/boot/dts/omap2420-n810.dts index 7c485fbfa535..4c412a480c3e 100644 --- a/arch/arm/boot/dts/omap2420-n810.dts +++ b/arch/arm/boot/dts/omap2420-n810.dts @@ -8,9 +8,26 @@ compatible = "nokia,n810", "nokia,n8x0", "ti,omap2420", "ti,omap2"; }; +&omap2420_pmx { + mcbsp2_pins: mcbsp2_pins { + pinctrl-single,pins = < + OMAP2420_CORE_IOPAD(0x0124, PIN_INPUT | MUX_MODE1) /* eac_ac_sclk.mcbsp2_clkx */ + OMAP2420_CORE_IOPAD(0x0125, PIN_INPUT | MUX_MODE1) /* eac_ac_fs.mcbsp2_fsx */ + OMAP2420_CORE_IOPAD(0x0126, PIN_INPUT | MUX_MODE1) /* eac_ac_din.mcbsp2_dr */ + OMAP2420_CORE_IOPAD(0x0127, PIN_OUTPUT | MUX_MODE1) /* eac_ac_dout.mcbsp2_dx */ + >; + }; +}; + &i2c2 { aic3x@18 { compatible = "tlv320aic3x"; reg = <0x18>; }; }; +&mcbsp2 { + pinctrl-names = "default"; + pinctrl-0 = <&mcbsp2_pins>; + + status = "okay"; +};