From patchwork Wed May 30 14:11:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Faiz Abbas X-Patchwork-Id: 10439061 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9740860327 for ; Wed, 30 May 2018 14:11:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8186F28E4A for ; Wed, 30 May 2018 14:11:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 761AB28E56; Wed, 30 May 2018 14:11:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2191E28E4E for ; Wed, 30 May 2018 14:11:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752772AbeE3OKr (ORCPT ); Wed, 30 May 2018 10:10:47 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:59110 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753453AbeE3OKp (ORCPT ); Wed, 30 May 2018 10:10:45 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4UEAJoO015893; Wed, 30 May 2018 09:10:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1527689419; bh=028IXmHyRLDUFZd95KJQ83+ZJn/0Z9jTNTXqt79rQXc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=YYSIpgPGX5NeMtbEqj8yCPsQ1AbB2nSzj9CLXuEwMC0fPNL9p3KsNCvuzHSCbjPDP z4NkViCImk24u9kckScVKxQzEN1q06Bx2nUI1dheHUOLK4uiTF6Ew6jeH19qh/dBE8 2rw4m2dwWijkNbbowFSyCWDBpiyl8PE0RSeYea/k= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4UEAJBZ014486; Wed, 30 May 2018 09:10:19 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 30 May 2018 09:10:19 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 30 May 2018 09:10:19 -0500 Received: from a0230074-OptiPlex-7010.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4UE9wvO001195; Wed, 30 May 2018 09:10:16 -0500 From: Faiz Abbas To: , , , , CC: , , , , , Subject: [PATCH v2 5/6] ARM: dts: Add generic interconnect target module node for MCAN Date: Wed, 30 May 2018 19:41:32 +0530 Message-ID: <20180530141133.3711-6-faiz_abbas@ti.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180530141133.3711-1-faiz_abbas@ti.com> References: <20180530141133.3711-1-faiz_abbas@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ti-sysc driver provides support for manipulating the idlemodes and interconnect level resets. Add the generic interconnect target module node for MCAN to support the same. CC: Tony Lindgren Signed-off-by: Faiz Abbas --- arch/arm/boot/dts/dra76x.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/dra76x.dtsi b/arch/arm/boot/dts/dra76x.dtsi index bfc82636999c..57b8dc0fe719 100644 --- a/arch/arm/boot/dts/dra76x.dtsi +++ b/arch/arm/boot/dts/dra76x.dtsi @@ -11,6 +11,25 @@ / { compatible = "ti,dra762", "ti,dra7"; + ocp { + + target-module@0x42c00000 { + compatible = "ti,sysc-dra7-mcan"; + ranges = <0x0 0x42c00000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x42c01900 0x4>, + <0x42c01904 0x4>, + <0x42c01908 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET | + SYSC_DRA7_MCAN_ENAWAKEUP)>; + ti,syss-mask = <1>; + clocks = <&wkupaon_clkctrl DRA7_ADC_CLKCTRL 0>; + clock-names = "fck"; + }; + }; + }; /* MCAN interrupts are hard-wired to irqs 67, 68 */