From patchwork Fri Jul 24 07:40:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 11682449 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E7EC2618 for ; Fri, 24 Jul 2020 07:43:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CE2F42076A for ; Fri, 24 Jul 2020 07:43:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1595576598; bh=vVrPJpnrKh1wJ6LdbFf4wRAAhGQO0li9B4zgOch67X8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=Dcr96geqO7LY7QS5uvkmaBE/NW0fMhE7B2mK30fbs+OuxdHif9pBPs4rrERF3VtU0 JqzD803bsfqOcLPTuwlS/LFxUODXVc5tHTaTjO2DNvKd1Vl5N+entEFT55X95M8ivA 1ugUr4mzmf4FiCPrJe6qJOTDY0mCHchkfQPQtifM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727770AbgGXHnS (ORCPT ); Fri, 24 Jul 2020 03:43:18 -0400 Received: from mail.kernel.org ([198.145.29.99]:37436 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726607AbgGXHnR (ORCPT ); Fri, 24 Jul 2020 03:43:17 -0400 Received: from kozik-lap.mshome.net (unknown [194.230.155.213]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id AC146207DF; Fri, 24 Jul 2020 07:43:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1595576597; bh=vVrPJpnrKh1wJ6LdbFf4wRAAhGQO0li9B4zgOch67X8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oK0pLZKjQDf+Gnf2KXF0LQzFxSNdIcpwyg7pDNWGC7k/+0ja4u68Lfe+iWj8hqiic X1Ws8IdNMfZt0c5n7CaA5h2wow7rTsnHXmpi2YpSXv3agbQFETi8OJ/fFx9FsQjVyH 8lh+MllUjS/K+1KK9WrKZd6eWb8e6oPEoPESjfLM= From: Krzysztof Kozlowski To: Arnd Bergmann , Olof Johansson , Markus Mayer , bcm-kernel-feedback-list@broadcom.com, Florian Fainelli , Santosh Shilimkar , Matthias Brugger , Roger Quadros , Tony Lindgren , Vladimir Zapolskiy , Kukjin Kim , Thierry Reding , Jonathan Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-omap@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Andrew Morton , Linus Torvalds , Krzysztof Kozlowski Subject: [PATCH v2 26/29] memory: fsl_ifc: Fix whitespace issues Date: Fri, 24 Jul 2020 09:40:35 +0200 Message-Id: <20200724074038.5597-27-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200724074038.5597-1-krzk@kernel.org> References: <20200724074038.5597-1-krzk@kernel.org> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Fix minor whitespace and comment issues. Do not break message strings. No functional changes. Signed-off-by: Krzysztof Kozlowski --- Changes since v1: 1. New patch --- drivers/memory/fsl_ifc.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c index a2c971743ffe..89f99b5b6450 100644 --- a/drivers/memory/fsl_ifc.c +++ b/drivers/memory/fsl_ifc.c @@ -53,6 +53,7 @@ int fsl_ifc_find(phys_addr_t addr_base) for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { u32 cspr = ifc_in32(&fsl_ifc_ctrl_dev->gregs->cspr_cs[i].cspr); + if (cspr & CSPR_V && (cspr & CSPR_BA) == convert_ifc_address(addr_base)) return i; @@ -153,8 +154,8 @@ static irqreturn_t fsl_ifc_ctrl_irq(int irqno, void *data) /* read for chip select error */ cs_err = ifc_in32(&ifc->cm_evter_stat); if (cs_err) { - dev_err(ctrl->dev, "transaction sent to IFC is not mapped to" - "any memory bank 0x%08X\n", cs_err); + dev_err(ctrl->dev, "transaction sent to IFC is not mapped to any memory bank 0x%08X\n", + cs_err); /* clear the chip select error */ ifc_out32(IFC_CM_EVTER_STAT_CSER, &ifc->cm_evter_stat); @@ -163,24 +164,24 @@ static irqreturn_t fsl_ifc_ctrl_irq(int irqno, void *data) err_addr = ifc_in32(&ifc->cm_erattr1); if (status & IFC_CM_ERATTR0_ERTYP_READ) - dev_err(ctrl->dev, "Read transaction error" - "CM_ERATTR0 0x%08X\n", status); + dev_err(ctrl->dev, "Read transaction error CM_ERATTR0 0x%08X\n", + status); else - dev_err(ctrl->dev, "Write transaction error" - "CM_ERATTR0 0x%08X\n", status); + dev_err(ctrl->dev, "Write transaction error CM_ERATTR0 0x%08X\n", + status); err_axiid = (status & IFC_CM_ERATTR0_ERAID) >> IFC_CM_ERATTR0_ERAID_SHIFT; - dev_err(ctrl->dev, "AXI ID of the error" - "transaction 0x%08X\n", err_axiid); + dev_err(ctrl->dev, "AXI ID of the error transaction 0x%08X\n", + err_axiid); err_srcid = (status & IFC_CM_ERATTR0_ESRCID) >> IFC_CM_ERATTR0_ESRCID_SHIFT; - dev_err(ctrl->dev, "SRC ID of the error" - "transaction 0x%08X\n", err_srcid); + dev_err(ctrl->dev, "SRC ID of the error transaction 0x%08X\n", + err_srcid); - dev_err(ctrl->dev, "Transaction Address corresponding to error" - "ERADDR 0x%08X\n", err_addr); + dev_err(ctrl->dev, "Transaction Address corresponding to error ERADDR 0x%08X\n", + err_addr); ret = IRQ_HANDLED; } @@ -199,7 +200,7 @@ static irqreturn_t fsl_ifc_ctrl_irq(int irqno, void *data) * the resources needed for the controller only. The * resources for the NAND banks themselves are allocated * in the chip probe function. -*/ + */ static int fsl_ifc_ctrl_probe(struct platform_device *dev) { int ret = 0; @@ -250,8 +251,7 @@ static int fsl_ifc_ctrl_probe(struct platform_device *dev) /* get the Controller level irq */ fsl_ifc_ctrl_dev->irq = irq_of_parse_and_map(dev->dev.of_node, 0); if (fsl_ifc_ctrl_dev->irq == 0) { - dev_err(&dev->dev, "failed to get irq resource " - "for IFC\n"); + dev_err(&dev->dev, "failed to get irq resource for IFC\n"); ret = -ENODEV; goto err; }