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Thu, 7 Jan 2021 09:02:59 +0000 From: Zhiqiang Hou To: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@axis.com, lorenzo.pieralisi@arm.com, robh@kernel.org, bhelgaas@google.com Cc: kishon@ti.com, minghuan.Lian@nxp.com, jesper.nilsson@axis.com, jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, hayashi.kunihiko@socionext.com, Hou Zhiqiang Subject: [PATCH 4/4] PCI: dwc: Change the parameter of function dw_pcie_ep_reset_bar() Date: Thu, 7 Jan 2021 17:11:23 +0800 Message-Id: <20210107091123.8616-5-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210107091123.8616-1-Zhiqiang.Hou@nxp.com> References: <20210107091123.8616-1-Zhiqiang.Hou@nxp.com> X-Originating-IP: [119.31.174.73] X-ClientProxiedBy: SG2PR06CA0085.apcprd06.prod.outlook.com (2603:1096:3:14::11) To HE1PR0402MB3371.eurprd04.prod.outlook.com (2603:10a6:7:85::27) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.73) by SG2PR06CA0085.apcprd06.prod.outlook.com (2603:1096:3:14::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3742.6 via Frontend Transport; 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Signed-off-by: Hou Zhiqiang --- drivers/pci/controller/dwc/pci-dra7xx.c | 2 +- drivers/pci/controller/dwc/pci-layerscape-ep.c | 2 +- drivers/pci/controller/dwc/pcie-artpec6.c | 2 +- drivers/pci/controller/dwc/pcie-designware-ep.c | 16 +++++++--------- .../pci/controller/dwc/pcie-designware-plat.c | 3 +-- drivers/pci/controller/dwc/pcie-designware.h | 5 +++-- drivers/pci/controller/dwc/pcie-uniphier-ep.c | 3 +-- 7 files changed, 15 insertions(+), 18 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c index b105af63854a..12726c63366f 100644 --- a/drivers/pci/controller/dwc/pci-dra7xx.c +++ b/drivers/pci/controller/dwc/pci-dra7xx.c @@ -383,7 +383,7 @@ static void dra7xx_pcie_ep_init(struct dw_pcie_ep *ep) enum pci_barno bar; for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) - dw_pcie_ep_reset_bar(pci, bar); + dw_pcie_ep_reset_bar(ep, bar); dra7xx_pcie_enable_wrapper_interrupts(dra7xx); } diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c index 0f5e4104c06c..dcee95e16139 100644 --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c @@ -62,7 +62,7 @@ static void ls_pcie_ep_init(struct dw_pcie_ep *ep) return; for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) - dw_pcie_ep_reset_bar(pci, bar); + dw_pcie_ep_reset_bar(ep, bar); pcie->ls_epc->msi_capable = ep_func->msi_cap ? true : false; pcie->ls_epc->msix_capable = ep_func->msix_cap ? true : false; diff --git a/drivers/pci/controller/dwc/pcie-artpec6.c b/drivers/pci/controller/dwc/pcie-artpec6.c index 597c282f586c..f833daf6d422 100644 --- a/drivers/pci/controller/dwc/pcie-artpec6.c +++ b/drivers/pci/controller/dwc/pcie-artpec6.c @@ -348,7 +348,7 @@ static void artpec6_pcie_ep_init(struct dw_pcie_ep *ep) artpec6_pcie_wait_for_phy(artpec6_pcie); for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) - dw_pcie_ep_reset_bar(pci, bar); + dw_pcie_ep_reset_bar(ep, bar); } static int artpec6_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index d8eb9a984547..2dc960e74fd0 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -49,11 +49,11 @@ static unsigned int dw_pcie_ep_get_func_cfg_addr(struct dw_pcie_ep *ep, return 0; } -static void __dw_pcie_ep_reset_bar(struct dw_pcie *pci, u8 func_no, +static void __dw_pcie_ep_reset_bar(struct dw_pcie_ep *ep, u8 func_no, enum pci_barno bar, int flags) { u32 reg; - struct dw_pcie_ep *ep = &pci->ep; + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); struct dw_pcie_ep_func *func = dw_pcie_ep_get_func_from_ep(ep, func_no); if (!func) @@ -70,14 +70,12 @@ static void __dw_pcie_ep_reset_bar(struct dw_pcie *pci, u8 func_no, dw_pcie_dbi_ro_wr_dis(pci); } -void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar) +void dw_pcie_ep_reset_bar(struct dw_pcie_ep *ep, enum pci_barno bar) { - u8 func_no, funcs; - - funcs = pci->ep.epc->max_functions; + u8 func_no; - for (func_no = 0; func_no < funcs; func_no++) - __dw_pcie_ep_reset_bar(pci, func_no, bar, 0); + for (func_no = 0; func_no < ep->epc->max_functions; func_no++) + __dw_pcie_ep_reset_bar(ep, func_no, bar, 0); } static u8 __dw_pcie_ep_find_next_cap(struct dw_pcie_ep *ep, u8 func_no, @@ -208,7 +206,7 @@ static void dw_pcie_ep_clear_bar(struct pci_epc *epc, u8 func_no, enum pci_barno bar = epf_bar->barno; u32 atu_index = ep->bar_to_atu[bar]; - __dw_pcie_ep_reset_bar(pci, func_no, bar, epf_bar->flags); + __dw_pcie_ep_reset_bar(ep, func_no, bar, epf_bar->flags); dw_pcie_disable_atu(pci, atu_index, DW_PCIE_REGION_INBOUND); clear_bit(atu_index, ep->ib_window_map); diff --git a/drivers/pci/controller/dwc/pcie-designware-plat.c b/drivers/pci/controller/dwc/pcie-designware-plat.c index 9b397c807261..49d51584a547 100644 --- a/drivers/pci/controller/dwc/pcie-designware-plat.c +++ b/drivers/pci/controller/dwc/pcie-designware-plat.c @@ -47,11 +47,10 @@ static const struct dw_pcie_ops dw_pcie_ops = { static void dw_plat_pcie_ep_init(struct dw_pcie_ep *ep) { - struct dw_pcie *pci = to_dw_pcie_from_ep(ep); enum pci_barno bar; for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) - dw_pcie_ep_reset_bar(pci, bar); + dw_pcie_ep_reset_bar(ep, bar); } static int dw_plat_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index b8cbe266e01c..10ba09237def 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -415,7 +415,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, u16 interrupt_num); int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep *ep, u8 func_no, u16 interrupt_num); -void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar); +void dw_pcie_ep_reset_bar(struct dw_pcie_ep *ep, enum pci_barno bar); struct dw_pcie_ep_func * dw_pcie_ep_get_func_from_ep(struct dw_pcie_ep *ep, u8 func_no); #else @@ -465,7 +465,8 @@ static inline int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep *ep, return 0; } -static inline void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar) +static inline void dw_pcie_ep_reset_bar(struct dw_pcie_ep *ep, + enum pci_barno bar) { } diff --git a/drivers/pci/controller/dwc/pcie-uniphier-ep.c b/drivers/pci/controller/dwc/pcie-uniphier-ep.c index 69810c6b0d58..21e185bf90d6 100644 --- a/drivers/pci/controller/dwc/pcie-uniphier-ep.c +++ b/drivers/pci/controller/dwc/pcie-uniphier-ep.c @@ -134,11 +134,10 @@ static void uniphier_pcie_stop_link(struct dw_pcie *pci) static void uniphier_pcie_ep_init(struct dw_pcie_ep *ep) { - struct dw_pcie *pci = to_dw_pcie_from_ep(ep); enum pci_barno bar; for (bar = BAR_0; bar <= BAR_5; bar++) - dw_pcie_ep_reset_bar(pci, bar); + dw_pcie_ep_reset_bar(ep, bar); } static int uniphier_pcie_ep_raise_legacy_irq(struct dw_pcie_ep *ep)