@@ -132,6 +132,7 @@
#define GPMC_CONFIG_DEV_SIZE 0x00000002
#define GPMC_CONFIG_DEV_TYPE 0x00000003
+#define GPMC_CONFIG_WAITPINPOLARITY(pin) (BIT(pin) << 8)
#define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31)
#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)
#define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29)
@@ -1881,6 +1882,18 @@ int gpmc_cs_program_settings(int cs, struct gpmc_settings *p)
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1);
+ if (p->wait_on_read || p->wait_on_write) {
+ config1 = gpmc_read_reg(GPMC_CONFIG);
+
+ if (p->wait_pin_active_low)
+ config1 &= ~GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin);
+ else
+ config1 |= GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin);
+
+ gpmc_write_reg(GPMC_CONFIG, config1);
+ }
+
+
return 0;
}
@@ -1985,6 +1998,8 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p)
"gpmc,wait-on-read");
p->wait_on_write = of_property_read_bool(np,
"gpmc,wait-on-write");
+ p->wait_pin_active_low = of_property_read_bool(np,
+ "gpmc,wait-pin-active-low");
if (!p->wait_on_read && !p->wait_on_write)
pr_debug("%s: rd/wr wait monitoring not enabled!\n",
__func__);
@@ -149,6 +149,7 @@ struct gpmc_settings {
u32 device_width; /* device bus width (8 or 16 bit) */
u32 mux_add_data; /* multiplex address & data */
u32 wait_pin; /* wait-pin to be used */
+ bool wait_pin_active_low; /* wait-pin polarity */
};
/* Data for each chip select */