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Niedermayr" To: , CC: , , , Subject: [PATCH v5 2/3] memory: omap-gpmc: add support for wait pin polarity Date: Fri, 16 Sep 2022 14:07:48 +0200 Message-ID: <20220916120749.2517727-3-benedikt.niedermayr@siemens.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220916120749.2517727-1-benedikt.niedermayr@siemens.com> References: <20220916120749.2517727-1-benedikt.niedermayr@siemens.com> MIME-Version: 1.0 X-Originating-IP: [144.145.220.65] X-ClientProxiedBy: DEMCHDC89XA.ad011.siemens.net (139.25.226.103) To DEMCHDC89XA.ad011.siemens.net (139.25.226.103) X-TM-AS-Product-Ver: SMEX-14.0.0.3080-8.6.1018-26680.007 X-TM-AS-Result: No-10--11.619300-8.000000 X-TMASE-MatchedRID: POsRPqSDEnZ2JssOPetOeImIDnzSS8mZE34mKqQRiel+J3gtIe0gA2tq QgJyb0BRWgm4fq9o0LPhkjv78Hej4ekIezYN3SFOKPXQFKk5uQGTCob0Yf2X3j8Ckw9b/GFeTJD l9FKHbrlHpEd1UrzmFY4nd5BIQmYqQjWDB8SvIeIkrBjqqIzVOO/Pzxjxyhd5EVuC0eNRYvJ7xI KEgZq/AeJiUqjHevI0F51v32DYCPs5GnFStuFoW0vAMVBNN3ewEnwQg0CZxZurm7DrUlmNkIAy6 p60ZV62fJ5/bZ6npdjKayT/BQTiGpefsKoW209bhhQN2X8ImVVHZZcelBAWAp1ZWdlQ94S0ahpn rRh/388= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--11.619300-8.000000 X-TMASE-Version: SMEX-14.0.0.3080-8.6.1018-26680.007 X-TM-SNTS-SMTP: 18D638CE024905B1A5EEE6137C9942F082B02C652B858DCBB557C510CEEAA18B2000:8 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: HE1EUR01FT063:EE_|AS1PR10MB5392:EE_ X-MS-Office365-Filtering-Correlation-Id: 48131a6d-6b18-4b91-aa12-08da97dc1c80 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bH7yoWVGEssySiz0tdAr0lRzSBvdD4A/y88csUbUb0K7RSFYcj7Lp3wPCrage1BFYFBeVtVR1wIlVxXndERD/W8kKnfaFZTLZSjHLQyhIww/Zl0bL4ryTfDl9raqMzKb1LTRlBbiuPaF1X6mSUemyxwgQzclEB4z6N/5JMG2ga9G4FfNTOx751+Rvc/tFZ1vOHhjd7e1yyWpureWLViPCVGdpMUbiXI4Osun7qnKiVemsYxkSCabshELNxgpC7g5IlPxN/MuSTmI1x2YYPhJ6QCpxZVspv9QOrcBOZZlAdHO95toKJsUx8keMctqPl5lapkJrWTqS/9vYEFmW8hOCguAwqX7D0e3lU63KRbAcsYjCU0FBeoXzedRln0AQ+3I06sx9MC5uzSfXDT1Dc2Ogzg1sdcbgOKaIfFltrWt2jd2TE5JRdFWUeXMU4HAucdXfRNu0/5pdzD3B4F+/JWzs4hQbvymazL022h1DYJtgkoJZELvGwJYZD/sNKdpXKYnbP4hxGqljyGCL5ljKUVNyR7+iPxFNTfFvxkDpGv3g6D/xvUGM9X+0pNVNrE8FxkqJaxBPVuyl8g5ld/kXQU2cCYUkMDdL7w4oscXuoTEFoaa2npECw2gd0qXr2b6XBTIdjTCb7E3djZL+l6KlLS2exovlIyQvFgXvBmRmQqrbpFeGl3/iIUlAQ+V93pn3MOL/HPkiUi0y96O/irihDHutXzixGnh4xTpux+L7rCCHAFTUYPVhQ4GRH4zR3UmI9mfFOm2WAjzhmzqrY3g6gNeSw== X-Forefront-Antispam-Report: CIP:194.138.21.74;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:hybrid.siemens.com;PTR:hybrid.siemens.com;CAT:NONE;SFS:(13230022)(4636009)(346002)(136003)(39860400002)(376002)(396003)(451199015)(36840700001)(40470700004)(46966006)(7596003)(16526019)(70586007)(110136005)(4326008)(70206006)(54906003)(7636003)(956004)(2616005)(2906002)(356005)(82740400003)(186003)(40480700001)(1076003)(47076005)(8676002)(8936002)(82960400001)(5660300002)(36756003)(41300700001)(82310400005)(336012)(26005)(36860700001)(478600001)(316002)(86362001)(6666004)(40460700003);DIR:OUT;SFP:1101; X-OriginatorOrg: siemens.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Sep 2022 12:08:05.2046 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 48131a6d-6b18-4b91-aa12-08da97dc1c80 X-MS-Exchange-CrossTenant-Id: 38ae3bcd-9579-4fd4-adda-b42e1495d55a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=38ae3bcd-9579-4fd4-adda-b42e1495d55a;Ip=[194.138.21.74];Helo=[hybrid.siemens.com] X-MS-Exchange-CrossTenant-AuthSource: HE1EUR01FT063.eop-EUR01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS1PR10MB5392 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Benedikt Niedermayr The waitpin polarity can be configured via the WAITPINPOLARITY bits in the GPMC_CONFIG register. This is currently not supported by the driver. This patch adds support for setting the required register bits with the "gpmc,wait-pin-polarity" dt-property. Signed-off-by: Benedikt Niedermayr --- drivers/memory/omap-gpmc.c | 27 +++++++++++++++++++++++++ include/linux/platform_data/gpmc-omap.h | 6 ++++++ 2 files changed, 33 insertions(+) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index ea495e93766b..2853fc28bccc 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -132,6 +132,7 @@ #define GPMC_CONFIG_DEV_SIZE 0x00000002 #define GPMC_CONFIG_DEV_TYPE 0x00000003 +#define GPMC_CONFIG_WAITPINPOLARITY(pin) (BIT(pin) << 8) #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) @@ -1882,6 +1883,17 @@ int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1); + if (p->wait_pin_polarity != WAITPINPOLARITY_DEFAULT) { + config1 = gpmc_read_reg(GPMC_CONFIG); + + if (p->wait_pin_polarity == WAITPINPOLARITY_ACTIVE_LOW) + config1 &= ~GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin); + else if (p->wait_pin_polarity == WAITPINPOLARITY_ACTIVE_HIGH) + config1 |= GPMC_CONFIG_WAITPINPOLARITY(p->wait_pin); + + gpmc_write_reg(GPMC_CONFIG, config1); + } + return 0; } @@ -1981,7 +1993,22 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) __func__); } + p->wait_pin_polarity = WAITPINPOLARITY_DEFAULT; + if (!of_property_read_u32(np, "gpmc,wait-pin", &p->wait_pin)) { + if (!of_property_read_u32(np, "gpmc,wait-pin-polarity", + &p->wait_pin_polarity)) { + if (p->wait_pin_polarity != WAITPINPOLARITY_ACTIVE_HIGH && + p->wait_pin_polarity != WAITPINPOLARITY_ACTIVE_LOW && + p->wait_pin_polarity != WAITPINPOLARITY_DEFAULT) { + pr_err("%s: Invalid wait-pin-polarity (pin: %d, pol: %d)\n", + __func__, p->wait_pin, p->wait_pin_polarity); + p->wait_pin_polarity = WAITPINPOLARITY_DEFAULT; + } + } else { + pr_err("%s: Failed to read gpmc,wait-pin-polarity\n", __func__); + } + p->wait_on_read = of_property_read_bool(np, "gpmc,wait-on-read"); p->wait_on_write = of_property_read_bool(np, diff --git a/include/linux/platform_data/gpmc-omap.h b/include/linux/platform_data/gpmc-omap.h index c9cc4e32435d..c46c28069c31 100644 --- a/include/linux/platform_data/gpmc-omap.h +++ b/include/linux/platform_data/gpmc-omap.h @@ -136,6 +136,11 @@ struct gpmc_device_timings { #define GPMC_MUX_AAD 1 /* Addr-Addr-Data multiplex */ #define GPMC_MUX_AD 2 /* Addr-Data multiplex */ +/* Wait pin polarity values */ +#define WAITPINPOLARITY_DEFAULT -1 +#define WAITPINPOLARITY_ACTIVE_LOW 0 +#define WAITPINPOLARITY_ACTIVE_HIGH 1 + struct gpmc_settings { bool burst_wrap; /* enables wrap bursting */ bool burst_read; /* enables read page/burst mode */ @@ -149,6 +154,7 @@ struct gpmc_settings { u32 device_width; /* device bus width (8 or 16 bit) */ u32 mux_add_data; /* multiplex address & data */ u32 wait_pin; /* wait-pin to be used */ + u32 wait_pin_polarity; /* wait-pin polarity */ }; /* Data for each chip select */