From patchwork Thu Mar 16 07:12:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Achal Verma X-Patchwork-Id: 13177062 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 970A7C6FD1F for ; Thu, 16 Mar 2023 07:14:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230071AbjCPHOc (ORCPT ); Thu, 16 Mar 2023 03:14:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230123AbjCPHOW (ORCPT ); Thu, 16 Mar 2023 03:14:22 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A692615565; Thu, 16 Mar 2023 00:14:00 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32G7ClG1018069; Thu, 16 Mar 2023 02:12:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678950767; bh=GGrsVB2NuWgQ/IDsTg782FJLIK98IZjp/7pCe7Mspxs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=H7oIJQxF2K+UALPbzya2ABFys2OKO0jjmVJdl/7gjoLwaMr7L8Wt0u08a0yrAjHHw yeI1A9rE9QKb6/PBYV+rtuUofAPCaBLMo8LurjAtDlLlHaj5qzUp3obZVP4wh35/2B +TelAO5IpzJ7vRRONNUubHRTGncpY472g3MYb8b8= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32G7Clvf077932 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 16 Mar 2023 02:12:47 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Thu, 16 Mar 2023 02:12:47 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Thu, 16 Mar 2023 02:12:47 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32G7Ckha014041; Thu, 16 Mar 2023 02:12:47 -0500 From: Achal Verma To: Tom Joseph , Lorenzo Pieralisi , Rob Herring , Krzysztof Wilczy_ski , Bjorn Helgaas , Vignesh Raghavendra CC: , , , , Achal Verma , Milind Parab , Subject: [PATCH v10 5/5] PCI: j721e: add j784s4 PCIe configuration Date: Thu, 16 Mar 2023 12:42:38 +0530 Message-ID: <20230316071238.200992-6-a-verma1@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230316071238.200992-1-a-verma1@ti.com> References: <20230316071238.200992-1-a-verma1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Matt Ranostay Add PCIe configuration for j784s4 platform which has 4x lane support. Tested-by: Achal Verma Signed-off-by: Matt Ranostay Reviewed-by: Roger Quadros Signed-off-by: Achal Verma --- drivers/pci/controller/cadence/pci-j721e.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index 58dcac9021e4..cce7b391f931 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -330,6 +330,20 @@ static const struct j721e_pcie_data am64_pcie_ep_data = { .max_lanes = 1, }; +static const struct j721e_pcie_data j784s4_pcie_rc_data = { + .mode = PCI_MODE_RC, + .quirk_retrain_flag = true, + .byte_access_allowed = false, + .linkdown_irq_regfield = LINK_DOWN, + .max_lanes = 4, +}; + +static const struct j721e_pcie_data j784s4_pcie_ep_data = { + .mode = PCI_MODE_EP, + .linkdown_irq_regfield = LINK_DOWN, + .max_lanes = 4, +}; + static const struct of_device_id of_j721e_pcie_match[] = { { .compatible = "ti,j721e-pcie-host", @@ -355,6 +369,14 @@ static const struct of_device_id of_j721e_pcie_match[] = { .compatible = "ti,am64-pcie-ep", .data = &am64_pcie_ep_data, }, + { + .compatible = "ti,j784s4-pcie-host", + .data = &j784s4_pcie_rc_data, + }, + { + .compatible = "ti,j784s4-pcie-ep", + .data = &j784s4_pcie_ep_data, + }, {}, };