From patchwork Thu Feb 15 15:18:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Thomas Richard X-Patchwork-Id: 13558667 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [217.70.183.193]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 147E81369B1; Thu, 15 Feb 2024 15:18:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.193 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708010302; cv=none; b=HNEvr2CSTzmss5GKp0VLH6p/tSy0cIZGZctMiRbf+6BQJWIoLbsbYgyl0n7C1U9OEsRvKh/zYTEIecMGg5wVWZ6ZjwJlIjVGE0UJPmrTSATz+scHhPHBOmeh7CyJLHTY7tTG4TdSkVZH4jaqSw2Mjso+u9z5prAbVJM36ceQPDY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708010302; c=relaxed/simple; bh=2TFlPyM41Sf4t4xii6hgp5vJ3GALCdhGjxyGeqMQFvc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MUtl/YDu0cQ9YUHNU8cAs7hCjcoE0pfOrPq6vAI37wDfX45Vkrjdtt15oSdEt3Iq2mQyE7OUleRRsoy8F12X/Fp4bYa/ZjofUHXDh+MtNqM4097RFhsQrLsW05Cs47f7TQIkEZNI8kp1zSyA9OVSPrePyoz/pgeHhTv43nqcG3w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=CTlTRNho; arc=none smtp.client-ip=217.70.183.193 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="CTlTRNho" Received: by mail.gandi.net (Postfix) with ESMTPSA id 6C64E240014; Thu, 15 Feb 2024 15:18:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1708010298; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=u4vVCbZCdjErPKHgNoTCllAMtn9YdU2fnFLAQjECyy8=; b=CTlTRNhoSLbiKdNqJqJoTxW34TZblJl7HncADB4IKrF2CasieEf6kuQgLn8yrL5MPK1iCa TC4eUeby5RjZNaVO+ufcWQoVFvj5woDEEXH1dQZliElSIDEZ9B7I/vTUA3gtyWyUzeLcHM PtHAnIlk1C0zcWkR4E0wHTHxg+ZwDOSYvwCJZ/eWnll8wzZIqKTa9ClMG/cj/I+ktkwhrf NZXHgNJTkwGAkM9fjEDJeG0mjplmLiXVliAkBYXNEvfY0QhYx72LjBRY9tZNaaeP2zo5AI Q222yjhEVScLtF/CTQMpb7N3mTwxitYkUDAIvmOW83XHkfDwa3uWWbU0tnyv/w== From: Thomas Richard Date: Thu, 15 Feb 2024 16:18:02 +0100 Subject: [PATCH v3 17/18] PCI: j721e: add reset GPIO to struct j721e_pcie Precedence: bulk X-Mailing-List: linux-omap@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240102-j7200-pcie-s2r-v3-17-5c2e4a3fac1f@bootlin.com> References: <20240102-j7200-pcie-s2r-v3-0-5c2e4a3fac1f@bootlin.com> In-Reply-To: <20240102-j7200-pcie-s2r-v3-0-5c2e4a3fac1f@bootlin.com> To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Tony Lindgren , Haojian Zhuang , Vignesh R , Aaro Koskinen , Janusz Krzysztofik , Andi Shyti , Peter Rosin , Vinod Koul , Kishon Vijay Abraham I , Philipp Zabel , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Bjorn Helgaas Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, linux-i2c@vger.kernel.org, linux-phy@lists.infradead.org, linux-pci@vger.kernel.org, gregory.clement@bootlin.com, theo.lebrun@bootlin.com, thomas.petazzoni@bootlin.com, u-kumar1@ti.com, Thomas Richard X-Mailer: b4 0.12.0 X-GND-Sasl: thomas.richard@bootlin.com From: Théo Lebrun Add reset GPIO to struct j721e_pcie, so it can be used at suspend and resume stages. Signed-off-by: Théo Lebrun Signed-off-by: Thomas Richard --- drivers/pci/controller/cadence/pci-j721e.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c index 2c87e7728a65..9c588e79f5ac 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -54,6 +54,7 @@ struct j721e_pcie { struct clk *refclk; u32 mode; u32 num_lanes; + struct gpio_desc *reset_gpio; void __iomem *user_cfg_base; void __iomem *intd_cfg_base; u32 linkdown_irq_regfield; @@ -359,7 +360,6 @@ static int j721e_pcie_probe(struct platform_device *pdev) struct j721e_pcie *pcie; struct cdns_pcie_rc *rc = NULL; struct cdns_pcie_ep *ep = NULL; - struct gpio_desc *gpiod; void __iomem *base; struct clk *clk; u32 num_lanes; @@ -468,9 +468,9 @@ static int j721e_pcie_probe(struct platform_device *pdev) switch (mode) { case PCI_MODE_RC: - gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); - if (IS_ERR(gpiod)) { - ret = PTR_ERR(gpiod); + pcie->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(pcie->reset_gpio)) { + ret = PTR_ERR(pcie->reset_gpio); if (ret != -EPROBE_DEFER) dev_err(dev, "Failed to get reset GPIO\n"); goto err_get_sync; @@ -504,9 +504,9 @@ static int j721e_pcie_probe(struct platform_device *pdev) * mode is selected while enabling the PHY. So deassert PERST# * after 100 us. */ - if (gpiod) { + if (pcie->reset_gpio) { usleep_range(100, 200); - gpiod_set_value_cansleep(gpiod, 1); + gpiod_set_value_cansleep(pcie->reset_gpio, 1); } ret = cdns_pcie_host_setup(rc);